target/avr32_ap7k: Use 'bool' data type
[fw/openocd] / src / target / cortex_m.c
index 3c97bc3dcf123c62f29117cc9541a4e267b466e4..4bada398dcda43cb86536720b6747dabe6db8514 100644 (file)
@@ -265,7 +265,7 @@ static int cortex_m_endreset_event(struct target *target)
                return retval;
        }
 
-       cortex_m->fpb_enabled = 1;
+       cortex_m->fpb_enabled = true;
 
        /* Restore FPB registers */
        for (i = 0; i < cortex_m->fp_num_code + cortex_m->fp_num_lit; i++) {
@@ -877,10 +877,17 @@ static int cortex_m_step(struct target *target, int current,
                        else {
 
                                /* Set a temporary break point */
-                               if (breakpoint)
+                               if (breakpoint) {
                                        retval = cortex_m_set_breakpoint(target, breakpoint);
-                               else
-                                       retval = breakpoint_add(target, pc_value, 2, BKPT_HARD);
+                               } else {
+                                       enum breakpoint_type type = BKPT_HARD;
+                                       if (cortex_m->fp_rev == 0 && pc_value > 0x1FFFFFFF) {
+                                               /* FPB rev.1 cannot handle such addr, try BKPT instr */
+                                               type = BKPT_SOFT;
+                                       }
+                                       retval = breakpoint_add(target, pc_value, 2, type);
+                               }
+
                                bool tmp_bp_set = (retval == ERROR_OK);
 
                                /* No more breakpoints left, just do a step */
@@ -1173,7 +1180,7 @@ int cortex_m_set_breakpoint(struct target *target, struct breakpoint *breakpoint
                        LOG_ERROR("Unhandled Cortex-M Flash Patch Breakpoint architecture revision");
                        return ERROR_FAIL;
                }
-               comparator_list[fp_num].used = 1;
+               comparator_list[fp_num].used = true;
                comparator_list[fp_num].fpcr_value = fpcr_value;
                target_write_u32(target, comparator_list[fp_num].fpcr_address,
                        comparator_list[fp_num].fpcr_value);
@@ -1188,7 +1195,7 @@ int cortex_m_set_breakpoint(struct target *target, struct breakpoint *breakpoint
                                return retval;
                        }
 
-                       cortex_m->fpb_enabled = 1;
+                       cortex_m->fpb_enabled = true;
                }
        } else if (breakpoint->type == BKPT_SOFT) {
                uint8_t code[4];
@@ -1247,7 +1254,7 @@ int cortex_m_unset_breakpoint(struct target *target, struct breakpoint *breakpoi
                        LOG_DEBUG("Invalid FP Comparator number in breakpoint");
                        return ERROR_OK;
                }
-               comparator_list[fp_num].used = 0;
+               comparator_list[fp_num].used = false;
                comparator_list[fp_num].fpcr_value = 0;
                target_write_u32(target, comparator_list[fp_num].fpcr_address,
                        comparator_list[fp_num].fpcr_value);
@@ -1344,7 +1351,7 @@ int cortex_m_set_watchpoint(struct target *target, struct watchpoint *watchpoint
                LOG_ERROR("Can not find free DWT Comparator");
                return ERROR_FAIL;
        }
-       comparator->used = 1;
+       comparator->used = true;
        watchpoint->set = dwt_num + 1;
 
        comparator->comp = watchpoint->address;
@@ -1401,7 +1408,7 @@ int cortex_m_unset_watchpoint(struct target *target, struct watchpoint *watchpoi
        }
 
        comparator = cortex_m->dwt_comparator_list + dwt_num;
-       comparator->used = 0;
+       comparator->used = false;
        comparator->function = 0;
        target_write_u32(target, comparator->dwt_comparator_address + 8,
                comparator->function);
@@ -2262,21 +2269,27 @@ static int cortex_m_init_arch_info(struct target *target,
        armv7m->load_core_reg_u32 = cortex_m_load_core_reg_u32;
        armv7m->store_core_reg_u32 = cortex_m_store_core_reg_u32;
 
-       target_register_timer_callback(cortex_m_handle_target_request, 1, 1, target);
+       target_register_timer_callback(cortex_m_handle_target_request, 1,
+               TARGET_TIMER_TYPE_PERIODIC, target);
 
        return ERROR_OK;
 }
 
 static int cortex_m_target_create(struct target *target, Jim_Interp *interp)
 {
-       struct cortex_m_common *cortex_m = calloc(1, sizeof(struct cortex_m_common));
-       cortex_m->common_magic = CORTEX_M_COMMON_MAGIC;
        struct adiv5_private_config *pc;
 
        pc = (struct adiv5_private_config *)target->private_config;
        if (adiv5_verify_config(pc) != ERROR_OK)
                return ERROR_FAIL;
 
+       struct cortex_m_common *cortex_m = calloc(1, sizeof(struct cortex_m_common));
+       if (cortex_m == NULL) {
+               LOG_ERROR("No memory creating target");
+               return ERROR_FAIL;
+       }
+
+       cortex_m->common_magic = CORTEX_M_COMMON_MAGIC;
        cortex_m->apsel = pc->ap_num;
 
        cortex_m_init_arch_info(target, cortex_m, pc->dap);