cortex_m: initialize unused CPU variables to 0 for poll info output

[fw/openocd] / src / target / cortex_m.c

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 8000b9a81a169fb29a8121b780c9393527dba9e1..0f26cda4d057737572ded0c2bec2e55084e6a58d 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -124,16 +124,20 @@ static int cortexm3_dap_write_coreregister_u32(struct adiv5_dap *swjdp,
        if (retval != ERROR_OK)
                return retval;
        retval = dap_queue_ap_write(swjdp, AP_REG_BD0 | (DCB_DCRDR & 0xC), value);
-       // XXX check retval
+       if (retval != ERROR_OK)
+               return retval;
 
        /* mem_ap_write_u32(swjdp, DCB_DCRSR, i | DCRSR_WnR); */
        retval = dap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_OFF, DCB_DCRSR & 0xFFFFFFF0);
        if (retval != ERROR_OK)
                return retval;
        retval = dap_queue_ap_write(swjdp, AP_REG_BD0 | (DCB_DCRSR & 0xC), regnum | DCRSR_WnR);
-       // XXX check retval
+       if (retval != ERROR_OK)
+               return retval;
 
        retval = dap_run(swjdp);
+       if (retval != ERROR_OK)
+               return retval;
 
        /* restore DCB_DCRDR - this needs to be in a seperate
         * transaction otherwise the emulated DCC channel breaks */
@@ -337,7 +341,7 @@ static int cortex_m3_examine_debug_reason(struct target *target)
 
 static int cortex_m3_examine_exception_reason(struct target *target)
 {
-       uint32_t shcsr, except_sr, cfsr = -1, except_ar = -1;
+       uint32_t shcsr = 0, except_sr = 0, cfsr = -1, except_ar = -1;
        struct armv7m_common *armv7m = target_to_armv7m(target);
        struct adiv5_dap *swjdp = &armv7m->dap;
        int retval;