int start_byte = address & 0x3;
struct reg *reg;
uint32_t dscr;
- char *tmp_buff = NULL;
+ uint32_t *tmp_buff;
uint32_t buff32[2];
if (target->state != TARGET_HALTED) {
LOG_WARNING("target not halted");
total_u32 = DIV_ROUND_UP((address & 3) + total_bytes, 4);
+ /* Due to offset word alignment, the buffer may not have space
+ * to read the full first and last int32 words,
+ * hence, malloc space to read into, then copy and align into the buffer.
+ */
+ tmp_buff = malloc(total_u32 * 4);
+ if (tmp_buff == NULL)
+ return ERROR_FAIL;
+
/* Mark register R0 as dirty, as it will be used
* for transferring the data.
* It will be restored automatically when exiting
goto error_unset_dtr_r;
- /* Due to offset word alignment, the buffer may not have space
- * to read the full first and last int32 words,
- * hence, malloc space to read into, then copy and align into the buffer.
- */
- tmp_buff = (char *) malloc(total_u32<<2);
-
/* The last word needs to be handled separately - read all other words in one go.
*/
if (total_u32 > 1) {
*
* This data is read in aligned to 32 bit boundary, hence may need shifting later.
*/
- retval = mem_ap_sel_read_buf_u32_noincr(swjdp, armv7a->debug_ap, (uint8_t *)tmp_buff, (total_u32-1)<<2,
+ retval = mem_ap_sel_read_buf_u32_noincr(swjdp, armv7a->debug_ap, (uint8_t *)tmp_buff, (total_u32-1) * 4,
armv7a->debug_base + CPUDBG_DTRTX);
if (retval != ERROR_OK)
goto error_unset_dtr_r;
/* Read the last word */
retval = mem_ap_sel_read_atomic_u32(swjdp, armv7a->debug_ap,
- armv7a->debug_base + CPUDBG_DTRTX, (uint32_t *)&tmp_buff[(total_u32-1)<<2]);
+ armv7a->debug_base + CPUDBG_DTRTX, &tmp_buff[total_u32 - 1]);
if (retval != ERROR_OK)
goto error_free_buff_r;
/* Copy and align the data into the output buffer */
- memcpy(buffer, &tmp_buff[start_byte], total_bytes);
+ memcpy(buffer, (uint8_t *)tmp_buff + start_byte, total_bytes);
free(tmp_buff);
return retval;
}
-static int cortex_a8_bulk_write_memory(struct target *target, uint32_t address,
- uint32_t count, const uint8_t *buffer)
-{
- return cortex_a8_write_memory(target, address, 4, count, buffer);
-}
-
static int cortex_a8_handle_target_request(void *priv)
{
struct target *target = priv;
.chain = armv7a_command_handlers,
},
{
- .name = "cortex_a8",
+ .name = "cortex_a",
.mode = COMMAND_ANY,
- .help = "Cortex-A8 command group",
+ .help = "Cortex-A command group",
.usage = "",
.chain = cortex_a8_exec_command_handlers,
},
};
struct target_type cortexa8_target = {
- .name = "cortex_a8",
+ .name = "cortex_a",
+ .deprecated_name = "cortex_a8",
.poll = cortex_a8_poll,
.arch_state = armv7a_arch_state,
.read_memory = cortex_a8_read_memory,
.write_memory = cortex_a8_write_memory,
- .bulk_write_memory = cortex_a8_bulk_write_memory,
.checksum_memory = arm_checksum_memory,
.blank_check_memory = arm_blank_check_memory,
.read_memory = cortex_a8_read_memory,
.write_memory = cortex_a8_write_memory,
- .bulk_write_memory = cortex_a8_bulk_write_memory,
.checksum_memory = arm_checksum_memory,
.blank_check_memory = arm_blank_check_memory,