+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2010 by Oleksandr Tymoshenko <gonzo@bluezbox.com> *
* Based on mips_m4k code: *
* Copyright (C) 2008 by Spencer Oliver <spen@spen-soft.co.uk> *
* Copyright (C) 2008 by David T.L. Wong *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "avr32_regs.h"
#include "avr32_ap7k.h"
-static char *avr32_core_reg_list[] = {
+static const char * const avr32_core_reg_list[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8",
"r9", "r10", "r11", "r12", "sp", "lr", "pc", "sr"
};
-static struct avr32_core_reg
+static const struct avr32_core_reg
avr32_core_reg_list_arch_info[AVR32NUMCOREREGS] = {
{0, NULL, NULL},
{1, NULL, NULL},
static int avr32_read_core_reg(struct target *target, int num);
static int avr32_write_core_reg(struct target *target, int num);
-int avr32_ap7k_save_context(struct target *target)
+static int avr32_ap7k_save_context(struct target *target)
{
int retval, i;
struct avr32_ap7k_common *ap7k = target_to_ap7k(target);
return ERROR_OK;
}
-int avr32_ap7k_restore_context(struct target *target)
+static int avr32_ap7k_restore_context(struct target *target)
{
int i;
reg_value = ap7k->core_regs[num];
buf_set_u32(ap7k->core_cache->reg_list[num].value, 0, 32, reg_value);
- ap7k->core_cache->reg_list[num].valid = 1;
- ap7k->core_cache->reg_list[num].dirty = 0;
+ ap7k->core_cache->reg_list[num].valid = true;
+ ap7k->core_cache->reg_list[num].dirty = false;
return ERROR_OK;
}
reg_value = buf_get_u32(ap7k->core_cache->reg_list[num].value, 0, 32);
ap7k->core_regs[num] = reg_value;
LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num, reg_value);
- ap7k->core_cache->reg_list[num].valid = 1;
- ap7k->core_cache->reg_list[num].dirty = 0;
+ ap7k->core_cache->reg_list[num].valid = true;
+ ap7k->core_cache->reg_list[num].dirty = false;
return ERROR_OK;
}
return ERROR_TARGET_NOT_HALTED;
buf_set_u32(reg->value, 0, 32, value);
- reg->dirty = 1;
- reg->valid = 1;
+ reg->dirty = true;
+ reg->valid = true;
return ERROR_OK;
}
struct avr32_ap7k_common *ap7k = target_to_ap7k(target);
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
struct reg_cache *cache = malloc(sizeof(struct reg_cache));
- struct reg *reg_list = malloc(sizeof(struct reg) * num_regs);
+ struct reg *reg_list = calloc(num_regs, sizeof(struct reg));
struct avr32_core_reg *arch_info =
malloc(sizeof(struct avr32_core_reg) * num_regs);
int i;
reg_list[i].name = avr32_core_reg_list[i];
reg_list[i].size = 32;
reg_list[i].value = calloc(1, 4);
- reg_list[i].dirty = 0;
- reg_list[i].valid = 0;
+ reg_list[i].dirty = false;
+ reg_list[i].valid = false;
reg_list[i].type = &avr32_reg_type;
reg_list[i].arch_info = &arch_info[i];
}
return ERROR_OK;
}
-static int avr32_ap7k_soft_reset_halt(struct target *target)
-{
- LOG_ERROR("%s: implement me", __func__);
-
- return ERROR_OK;
-}
-
static int avr32_ap7k_resume(struct target *target, int current,
- uint32_t address, int handle_breakpoints, int debug_execution)
+ target_addr_t address, int handle_breakpoints, int debug_execution)
{
struct avr32_ap7k_common *ap7k = target_to_ap7k(target);
struct breakpoint *breakpoint = NULL;
/* Single step past breakpoint at current address */
breakpoint = breakpoint_find(target, resume_pc);
if (breakpoint) {
- LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
+ LOG_DEBUG("unset breakpoint at 0x%8.8" TARGET_PRIxADDR "", breakpoint->address);
#if 0
avr32_ap7k_unset_breakpoint(target, breakpoint);
avr32_ap7k_single_step_core(target);
}
static int avr32_ap7k_step(struct target *target, int current,
- uint32_t address, int handle_breakpoints)
+ target_addr_t address, int handle_breakpoints)
{
LOG_ERROR("%s: implement me", __func__);
return ERROR_OK;
}
-static int avr32_ap7k_read_memory(struct target *target, uint32_t address,
+static int avr32_ap7k_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct avr32_ap7k_common *ap7k = target_to_ap7k(target);
- LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
+ LOG_DEBUG("address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
address,
size,
count);
break;
case 1:
return avr32_jtag_read_memory8(&ap7k->jtag, address, count, buffer);
- break;
default:
break;
}
return ERROR_OK;
}
-static int avr32_ap7k_write_memory(struct target *target, uint32_t address,
+static int avr32_ap7k_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct avr32_ap7k_common *ap7k = target_to_ap7k(target);
- LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
+ LOG_DEBUG("address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
address,
size,
count);
break;
case 1:
return avr32_jtag_write_memory8(&ap7k->jtag, address, count, buffer);
- break;
default:
break;
}
struct avr32_ap7k_common *ap7k = calloc(1, sizeof(struct
avr32_ap7k_common));
- ap7k->common_magic = AP7k_COMMON_MAGIC;
+ ap7k->common_magic = AP7K_COMMON_MAGIC;
target->arch_info = ap7k;
return ERROR_OK;
if (!target_was_examined(target)) {
target_set_examined(target);
avr32_jtag_nexus_read(&ap7k->jtag, AVR32_OCDREG_DID, &devid);
- LOG_INFO("device id: %08x", devid);
+ LOG_INFO("device id: %08" PRIx32, devid);
avr32_ocd_setbits(&ap7k->jtag, AVR32_OCDREG_DC, OCDREG_DC_DBE);
avr32_jtag_nexus_read(&ap7k->jtag, AVR32_OCDREG_DS, &ds);
return ERROR_OK;
}
-int avr32_ap7k_arch_state(struct target *target)
+static int avr32_ap7k_arch_state(struct target *target)
{
struct avr32_ap7k_common *ap7k = target_to_ap7k(target);
return ERROR_OK;
}
-int avr32_ap7k_get_gdb_reg_list(struct target *target, struct reg **reg_list[],
+static int avr32_ap7k_get_gdb_reg_list(struct target *target, struct reg **reg_list[],
int *reg_list_size, enum target_register_class reg_class)
{
#if 0
return ERROR_FAIL;
}
-
-
struct target_type avr32_ap7k_target = {
.name = "avr32_ap7k",
.poll = avr32_ap7k_poll,
.arch_state = avr32_ap7k_arch_state,
- .target_request_data = NULL,
-
.halt = avr32_ap7k_halt,
.resume = avr32_ap7k_resume,
.step = avr32_ap7k_step,
.assert_reset = avr32_ap7k_assert_reset,
.deassert_reset = avr32_ap7k_deassert_reset,
- .soft_reset_halt = avr32_ap7k_soft_reset_halt,
.get_gdb_reg_list = avr32_ap7k_get_gdb_reg_list,
projects / fw / openocd / blobdiff