semihosting: fix mode flags for local host open()

[fw/openocd] / src / target / armv8_dpm.h

diff --git a/src/target/armv8_dpm.h b/src/target/armv8_dpm.h
index f40440370f0f4addafe98f60a9a0019c4adea205..c30b04ffa64736666e4ad8dc9cc41cc154f651eb 100644 (file)
--- a/src/target/armv8_dpm.h
+++ b/src/target/armv8_dpm.h
@@ -16,6 +16,7 @@
 #define OPENOCD_TARGET_ARMV8_DPM_H
 
 #include "arm_dpm.h"
+#include "helper/bits.h"
 
 /* forward-declare struct armv8_common */
 struct armv8_common;
@@ -31,13 +32,11 @@ struct armv8_common;
 int armv8_dpm_setup(struct arm_dpm *dpm);
 int armv8_dpm_initialize(struct arm_dpm *dpm);
 
-int armv8_dpm_read_current_registers(struct arm_dpm *);
+int armv8_dpm_read_current_registers(struct arm_dpm *dpm);
 int armv8_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode);
 
 
-int armv8_dpm_write_dirty_registers(struct arm_dpm *, bool bpwp);
-
-void armv8_dpm_report_wfar(struct arm_dpm *, uint64_t wfar);
+int armv8_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp);
 
 /* DSCR bits; see ARMv7a arch spec section C10.3.1.
  * Not all v7 bits are valid in v6.
@@ -96,6 +95,12 @@ void armv8_dpm_report_wfar(struct arm_dpm *, uint64_t wfar);
 #define DRCR_RESTART                   (1 << 1)
 #define DRCR_CLEAR_EXCEPTIONS  (1 << 2)
 
+/* ECR (Execution Control Register) bits */
+#define ECR_RCE         BIT(1)
+
+/* ESR (Event Status Register) bits */
+#define ESR_RC          BIT(1)
+
 /* PRSR (processor debug status register) bits */
 #define PRSR_PU                                        (1 << 0)
 #define PRSR_SPD                               (1 << 1)