stlink-v1: fix memory writes

[fw/openocd] / src / target / armv7m.h

diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index 07090b411bb556b95f77abb8d3a591ea882e1a87..cee2b605790acfffeec1f6dc45290d12a95c1e18 100644 (file)
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -23,11 +23,12 @@
  *   Free Software Foundation, Inc.,                                       *
  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  ***************************************************************************/
+
 #ifndef ARMV7M_COMMON_H
 #define ARMV7M_COMMON_H
 
-#include <target/arm_adi_v5.h>
-#include <target/arm.h>
+#include "arm_adi_v5.h"
+#include "arm.h"
 
 /* define for enabling armv7 gdb workarounds */
 #if 1
@@ -39,9 +40,7 @@ extern uint8_t armv7m_gdb_dummy_cpsr_value[];
 extern struct reg armv7m_gdb_dummy_cpsr_reg;
 #endif
 
-
-enum armv7m_mode
-{
+enum armv7m_mode {
        ARMV7M_MODE_THREAD = 0,
        ARMV7M_MODE_USER_THREAD = 1,
        ARMV7M_MODE_HANDLER = 2,
@@ -49,9 +48,10 @@ enum armv7m_mode
 };
 
 extern char *armv7m_mode_strings[];
+extern const int armv7m_psp_reg_map[];
+extern const int armv7m_msp_reg_map[];
 
-enum armv7m_regtype
-{
+enum armv7m_regtype {
        ARMV7M_REGISTER_CORE_GP,
        ARMV7M_REGISTER_CORE_SP,
        ARMV7M_REGISTER_MEMMAP
@@ -60,8 +60,7 @@ enum armv7m_regtype
 char *armv7m_exception_string(int number);
 
 /* offsets into armv7m core register cache */
-enum
-{
+enum {
        /* for convenience, the first set of indices match
         * the Cortex-M3 DCRSR selectors
         */
@@ -98,43 +97,53 @@ enum
 
 #define ARMV7M_COMMON_MAGIC 0x2A452A45
 
-struct armv7m_common
-{
+struct armv7m_common {
+       struct arm      arm;
+
        int common_magic;
        struct reg_cache *core_cache;
        enum armv7m_mode core_mode;
        int exception_number;
-       struct swjdp_common swjdp_info;
+       struct adiv5_dap dap;
+
+       uint32_t demcr;
 
        /* Direct processor core register read and writes */
-       int (*load_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t *value);
-       int (*store_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t value);
+       int (*load_core_reg_u32)(struct target *target,
+               enum armv7m_regtype type, uint32_t num, uint32_t *value);
+       int (*store_core_reg_u32)(struct target *target,
+               enum armv7m_regtype type, uint32_t num, uint32_t value);
+
        /* register cache to processor synchronization */
        int (*read_core_reg)(struct target *target, unsigned num);
        int (*write_core_reg)(struct target *target, unsigned num);
 
        int (*examine_debug_reason)(struct target *target);
-       void (*post_debug_entry)(struct target *target);
+       int (*post_debug_entry)(struct target *target);
 
        void (*pre_restore_context)(struct target *target);
-       void (*post_restore_context)(struct target *target);
 };
 
 static inline struct armv7m_common *
 target_to_armv7m(struct target *target)
 {
-       return target->arch_info;
+       return container_of(target->arch_info, struct armv7m_common, arm);
 }
 
-struct armv7m_algorithm
+static inline bool is_armv7m(struct armv7m_common *armv7m)
 {
+       return armv7m->common_magic == ARMV7M_COMMON_MAGIC;
+}
+
+struct armv7m_algorithm {
        int common_magic;
 
        enum armv7m_mode core_mode;
+
+       uint32_t context[ARMV7M_CONTROL + 1]; /* ARMV7M_NUM_REGS */
 };
 
-struct armv7m_core_reg
-{
+struct armv7m_core_reg {
        uint32_t num;
        enum armv7m_regtype type;
        struct target *target;
@@ -157,14 +166,28 @@ int armv7m_run_algorithm(struct target *target,
                uint32_t entry_point, uint32_t exit_point,
                int timeout_ms, void *arch_info);
 
+int armv7m_start_algorithm(struct target *target,
+               int num_mem_params, struct mem_param *mem_params,
+               int num_reg_params, struct reg_param *reg_params,
+               uint32_t entry_point, uint32_t exit_point,
+               void *arch_info);
+
+int armv7m_wait_algorithm(struct target *target,
+               int num_mem_params, struct mem_param *mem_params,
+               int num_reg_params, struct reg_param *reg_params,
+               uint32_t exit_point, int timeout_ms,
+               void *arch_info);
+
 int armv7m_invalidate_core_regs(struct target *target);
 
 int armv7m_restore_context(struct target *target);
 
 int armv7m_checksum_memory(struct target *target,
-               uint32_t address, uint32_t count, uint32_t* checksum);
+               uint32_t address, uint32_t count, uint32_t *checksum);
 int armv7m_blank_check_memory(struct target *target,
-               uint32_t address, uint32_t count, uint32_t* blank);
+               uint32_t address, uint32_t count, uint32_t *blank);
+
+int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);
 
 extern const struct command_registration armv7m_command_handlers[];