* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
-#ifndef ARMV7M_COMMON_H
-#define ARMV7M_COMMON_H
+#ifndef OPENOCD_TARGET_ARMV7M_H
+#define OPENOCD_TARGET_ARMV7M_H
#include "arm_adi_v5.h"
#include "arm.h"
-
-/* define for enabling armv7 gdb workarounds */
-#if 1
-#define ARMV7_GDB_HACKS
-#endif
-
-#ifdef ARMV7_GDB_HACKS
-extern uint8_t armv7m_gdb_dummy_cpsr_value[];
-extern struct reg armv7m_gdb_dummy_cpsr_reg;
-#endif
+#include "armv7m_trace.h"
extern const int armv7m_psp_reg_map[];
extern const int armv7m_msp_reg_map[];
-enum armv7m_regtype {
- ARMV7M_REGISTER_CORE_GP,
- ARMV7M_REGISTER_CORE_SP,
- ARMV7M_REGISTER_MEMMAP
-};
-
-char *armv7m_exception_string(int number);
+const char *armv7m_exception_string(int number);
/* offsets into armv7m core register cache */
enum {
enum {
FP_NONE = 0,
FPv4_SP,
+ FPv5_SP,
+ FPv5_DP,
};
+#define ARMV7M_NUM_CORE_REGS (ARMV7M_xPSR + 1)
+#define ARMV7M_NUM_CORE_REGS_NOFP (ARMV7M_NUM_CORE_REGS + 6)
+
#define ARMV7M_COMMON_MAGIC 0x2A452A45
struct armv7m_common {
struct arm arm;
int common_magic;
- struct reg_cache *core_cache;
int exception_number;
- struct adiv5_dap dap;
+
+ /* AP this processor is connected to in the DAP */
+ struct adiv5_ap *debug_ap;
int fp_feature;
uint32_t demcr;
/* stlink is a high level adapter, does not support all functions */
bool stlink;
- /* Direct processor core register read and writes */
- int (*load_core_reg_u32)(struct target *target,
- enum armv7m_regtype type, uint32_t num, uint32_t *value);
- int (*store_core_reg_u32)(struct target *target,
- enum armv7m_regtype type, uint32_t num, uint32_t value);
+ struct armv7m_trace_config trace_config;
- /* register cache to processor synchronization */
- int (*read_core_reg)(struct target *target, unsigned num);
- int (*write_core_reg)(struct target *target, unsigned num);
+ /* Direct processor core register read and writes */
+ int (*load_core_reg_u32)(struct target *target, uint32_t num, uint32_t *value);
+ int (*store_core_reg_u32)(struct target *target, uint32_t num, uint32_t value);
int (*examine_debug_reason)(struct target *target);
int (*post_debug_entry)(struct target *target);
return container_of(target->arch_info, struct armv7m_common, arm);
}
-static inline bool is_armv7m(struct armv7m_common *armv7m)
+static inline bool is_armv7m(const struct armv7m_common *armv7m)
{
return armv7m->common_magic == ARMV7M_COMMON_MAGIC;
}
uint32_t context[ARMV7M_LAST_REG]; /* ARMV7M_NUM_REGS */
};
-struct armv7m_core_reg {
- uint32_t num;
- enum armv7m_regtype type;
- struct target *target;
- struct armv7m_common *armv7m_common;
-};
-
struct reg_cache *armv7m_build_reg_cache(struct target *target);
+void armv7m_free_reg_cache(struct target *target);
+
enum armv7m_mode armv7m_number_to_mode(int number);
int armv7m_mode_to_number(enum armv7m_mode mode);
int armv7m_arch_state(struct target *target);
int armv7m_get_gdb_reg_list(struct target *target,
- struct reg **reg_list[], int *reg_list_size);
+ struct reg **reg_list[], int *reg_list_size,
+ enum target_register_class reg_class);
int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m);
int armv7m_run_algorithm(struct target *target,
int num_mem_params, struct mem_param *mem_params,
int num_reg_params, struct reg_param *reg_params,
- uint32_t entry_point, uint32_t exit_point,
+ target_addr_t entry_point, target_addr_t exit_point,
int timeout_ms, void *arch_info);
int armv7m_start_algorithm(struct target *target,
int num_mem_params, struct mem_param *mem_params,
int num_reg_params, struct reg_param *reg_params,
- uint32_t entry_point, uint32_t exit_point,
+ target_addr_t entry_point, target_addr_t exit_point,
void *arch_info);
int armv7m_wait_algorithm(struct target *target,
int num_mem_params, struct mem_param *mem_params,
int num_reg_params, struct reg_param *reg_params,
- uint32_t exit_point, int timeout_ms,
+ target_addr_t exit_point, int timeout_ms,
void *arch_info);
int armv7m_invalidate_core_regs(struct target *target);
int armv7m_restore_context(struct target *target);
int armv7m_checksum_memory(struct target *target,
- uint32_t address, uint32_t count, uint32_t *checksum);
+ target_addr_t address, uint32_t count, uint32_t *checksum);
int armv7m_blank_check_memory(struct target *target,
- uint32_t address, uint32_t count, uint32_t *blank);
+ target_addr_t address, uint32_t count, uint32_t *blank, uint8_t erased_value);
int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);
extern const struct command_registration armv7m_command_handlers[];
-#endif /* ARMV7M_H */
+#endif /* OPENOCD_TARGET_ARMV7M_H */
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