ARM720 uses the new inheritance/nesting scheme

[fw/openocd] / src / target / armv7m.h

diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index ec90b7150d0d8a16ab31724970156fb6922f5912..217f0e38c9ff7144520441dbe65ccc763c02eb75 100644 (file)
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -41,7 +41,7 @@ enum armv7m_mode
        ARMV7M_MODE_ANY = -1
 };
 
-extern char* armv7m_mode_strings[];
+extern char *armv7m_mode_strings[];
 
 enum armv7m_regtype
 {
@@ -50,22 +50,43 @@ enum armv7m_regtype
        ARMV7M_REGISTER_MEMMAP
 };
 
-extern char* armv7m_exception_strings[];
-
 extern char *armv7m_exception_string(int number);
 
 /* offsets into armv7m core register cache */
 enum
 {
+       /* for convenience, the first set of indices match
+        * the Cortex-M3 DCRSR selectors
+        */
+       ARMV7M_R0,
+       ARMV7M_R1,
+       ARMV7M_R2,
+       ARMV7M_R3,
+
+       ARMV7M_R4,
+       ARMV7M_R5,
+       ARMV7M_R6,
+       ARMV7M_R7,
+
+       ARMV7M_R8,
+       ARMV7M_R9,
+       ARMV7M_R10,
+       ARMV7M_R11,
+
+       ARMV7M_R12,
+       ARMV7M_R13,
+       ARMV7M_R14,
        ARMV7M_PC = 15,
+
        ARMV7M_xPSR = 16,
        ARMV7M_MSP,
        ARMV7M_PSP,
+
+       /* this next set of indices is arbitrary */
        ARMV7M_PRIMASK,
        ARMV7M_BASEPRI,
        ARMV7M_FAULTMASK,
        ARMV7M_CONTROL,
-       ARMV7NUMCOREREGS
 };
 
 #define ARMV7M_COMMON_MAGIC 0x2A452A45
@@ -78,7 +99,6 @@ typedef struct armv7m_common_s
        int exception_number;
        swjdp_common_t swjdp_info;
 
-
        /* Direct processor core register read and writes */
        int (*load_core_reg_u32)(struct target_s *target, enum armv7m_regtype type, uint32_t num, uint32_t *value);
        int (*store_core_reg_u32)(struct target_s *target, enum armv7m_regtype type, uint32_t num, uint32_t value);
@@ -87,15 +107,18 @@ typedef struct armv7m_common_s
        int (*write_core_reg)(struct target_s *target, int num);
 
        int (*examine_debug_reason)(target_t *target);
-       void (*pre_debug_entry)(target_t *target);
        void (*post_debug_entry)(target_t *target);
 
        void (*pre_restore_context)(target_t *target);
        void (*post_restore_context)(target_t *target);
-
-       void *arch_info;
 } armv7m_common_t;
 
+static inline struct armv7m_common_s *
+target_to_armv7m(struct target_s *target)
+{
+       return target->arch_info;
+}
+
 typedef struct armv7m_algorithm_s
 {
        int common_magic;
@@ -107,7 +130,6 @@ typedef struct armv7m_core_reg_s
 {
        uint32_t num;
        enum armv7m_regtype type;
-       enum armv7m_mode mode;
        target_t *target;
        armv7m_common_t *armv7m_common;
 } armv7m_core_reg_t;