target/arm: make 'arm core_state' command compatible with Cortex-M

[fw/openocd] / src / target / armv7m.c

diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 2bcb8abae0e050eb5bf973556b2633f2a62c1a7e..790e70e63d506ab00773fde924e30f9db7f6d1a9 100644 (file)
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
 /***************************************************************************
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
@@ -17,19 +19,6 @@
  *   Copyright (C) 2019 by Tomas Vanek                                     *
  *   vanekt@fbl.cz                                                         *
  *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
- *                                                                         *
  *   ARMv7-M Architecture, Application Level Reference Manual              *
  *              ARM DDI 0405C (September 2008)                             *
  *                                                                         *
@@ -44,6 +33,8 @@
 #include "algorithm.h"
 #include "register.h"
 #include "semihosting_common.h"
+#include <helper/log.h>
+#include <helper/binarybuffer.h>
 
 #if 0
 #define _DEBUG_INSTRUCTION_EXECUTION_
@@ -249,7 +240,7 @@ static int armv7m_set_core_reg(struct reg *reg, uint8_t *buf)
        return ERROR_OK;
 }
 
-static uint32_t armv7m_map_id_to_regsel(unsigned int arm_reg_id)
+uint32_t armv7m_map_id_to_regsel(unsigned int arm_reg_id)
 {
        switch (arm_reg_id) {
        case ARMV7M_R0 ... ARMV7M_R14:
@@ -287,7 +278,7 @@ static uint32_t armv7m_map_id_to_regsel(unsigned int arm_reg_id)
        }
 }
 
-static bool armv7m_map_reg_packing(unsigned int arm_reg_id,
+bool armv7m_map_reg_packing(unsigned int arm_reg_id,
                                        unsigned int *reg32_id, uint32_t *offset)
 {
 
@@ -329,11 +320,17 @@ static int armv7m_read_core_reg(struct target *target, struct reg *r,
 
        if (r->size <= 8) {
                /* any 8-bit or shorter register is packed */
-               uint32_t offset = 0;    /* silence false gcc warning */
+               uint32_t offset;
                unsigned int reg32_id;
 
                bool is_packed = armv7m_map_reg_packing(num, &reg32_id, &offset);
-               assert(is_packed);
+               if (!is_packed) {
+                       /* We should not get here as all 8-bit or shorter registers
+                        * are packed */
+                       assert(false);
+                       /* assert() does nothing if NDEBUG is defined */
+                       return ERROR_FAIL;
+               }
                struct reg *r32 = &armv7m->arm.core_cache->reg_list[reg32_id];
 
                /* Read 32-bit container register if not cached */
@@ -394,11 +391,17 @@ static int armv7m_write_core_reg(struct target *target, struct reg *r,
 
        if (r->size <= 8) {
                /* any 8-bit or shorter register is packed */
-               uint32_t offset = 0;    /* silence false gcc warning */
+               uint32_t offset;
                unsigned int reg32_id;
 
                bool is_packed = armv7m_map_reg_packing(num, &reg32_id, &offset);
-               assert(is_packed);
+               if (!is_packed) {
+                       /* We should not get here as all 8-bit or shorter registers
+                        * are packed */
+                       assert(false);
+                       /* assert() does nothing if NDEBUG is defined */
+                       return ERROR_FAIL;
+               }
                struct reg *r32 = &armv7m->arm.core_cache->reg_list[reg32_id];
 
                if (!r32->valid) {
@@ -462,7 +465,7 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[],
                size = ARMV7M_NUM_CORE_REGS;
 
        *reg_list = malloc(sizeof(struct reg *) * size);
-       if (*reg_list == NULL)
+       if (!*reg_list)
                return ERROR_FAIL;
 
        for (i = 0; i < size; i++)
@@ -547,7 +550,7 @@ int armv7m_start_algorithm(struct target *target,
                        continue;
 
                struct reg *reg =
-                       register_get_by_name(armv7m->arm.core_cache, reg_params[i].reg_name, 0);
+                       register_get_by_name(armv7m->arm.core_cache, reg_params[i].reg_name, false);
 /*             uint32_t regvalue; */
 
                if (!reg) {
@@ -663,7 +666,7 @@ int armv7m_wait_algorithm(struct target *target,
                if (reg_params[i].direction != PARAM_OUT) {
                        struct reg *reg = register_get_by_name(armv7m->arm.core_cache,
                                        reg_params[i].reg_name,
-                                       0);
+                                       false);
 
                        if (!reg) {
                                LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
@@ -851,6 +854,7 @@ int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m)
        /* Enable stimulus port #0 by default */
        armv7m->trace_config.itm_ter[0] = 1;
 
+       arm->core_state = ARM_STATE_THUMB;
        arm->core_type = ARM_CORE_TYPE_M_PROFILE;
        arm->arch_info = armv7m;
        arm->setup_semihosting = armv7m_setup_semihosting;
@@ -955,7 +959,7 @@ int armv7m_blank_check_memory(struct target *target,
                blocks_to_check = num_blocks;
 
        struct algo_block *params = malloc((blocks_to_check+1)*sizeof(struct algo_block));
-       if (params == NULL) {
+       if (!params) {
                retval = ERROR_FAIL;
                goto cleanup1;
        }