- slight mips32 cleanup/reformat

[fw/openocd] / src / target / armv7m.c

diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index ae4d82ba0b62312b6c2e8b76d69a0e10b2585b69..2258967a316821f2cdd7356cb115d8b3c45ef321 100644 (file)
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -216,7 +216,7 @@ int armv7m_read_core_reg(struct target_s *target, int num)
        armv7m->core_cache->reg_list[num].valid = 1;
        armv7m->core_cache->reg_list[num].dirty = 0;
 
-       return ERROR_OK;
+       return retval;
 }
 
 int armv7m_write_core_reg(struct target_s *target, int num)
@@ -297,6 +297,42 @@ int armv7m_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_
        return ERROR_OK;
 }
 
+/* run to exit point. return error if exit point was not reached. */
+static int armv7m_run_and_wait(struct target_s *target, u32 entry_point, int timeout_ms, u32 exit_point, armv7m_common_t *armv7m)
+{
+       u32 pc;
+       int retval;
+       /* This code relies on the target specific  resume() and  poll()->debug_entry()
+       sequence to write register values to the processor and the read them back */
+       if((retval = target_resume(target, 0, entry_point, 1, 1)) != ERROR_OK)
+       {
+               return retval;
+       }
+
+       retval = target_wait_state(target, TARGET_HALTED, timeout_ms);
+       // If the target fails to halt due to the breakpoint, force a halt
+       if (retval != ERROR_OK || target->state != TARGET_HALTED)
+       {
+               if ((retval=target_halt(target))!=ERROR_OK)
+                       return retval;
+               if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK)
+               {
+                       return retval;
+               }
+               return ERROR_TARGET_TIMEOUT;
+       }
+
+
+       armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
+       if (pc != exit_point)
+       {
+               LOG_DEBUG("failed algoritm halted at 0x%x ", pc);
+               return ERROR_TARGET_TIMEOUT;
+       }
+
+       return ERROR_OK;
+}
+
 int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info)
 {
        /* get pointers to arch-specific information */
@@ -304,7 +340,6 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
        armv7m_algorithm_t *armv7m_algorithm_info = arch_info;
        enum armv7m_mode core_mode = armv7m->core_mode;
        int retval = ERROR_OK;
-       u32 pc;
        int i;
        u32 context[ARMV7NUMCOREREGS];
 
@@ -331,7 +366,8 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
 
        for (i = 0; i < num_mem_params; i++)
        {
-               target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value);
+               if ((retval=target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value))!=ERROR_OK)
+                       return retval;
        }
 
        for (i = 0; i < num_reg_params; i++)
@@ -370,38 +406,23 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
                return ERROR_TARGET_FAILURE;
        }
 
-       /* This code relies on the target specific  resume() and  poll()->debug_entry()
-       sequence to write register values to the processor and the read them back */
-       target_resume(target, 0, entry_point, 1, 1);
-       target_poll(target);
-
-       target_wait_state(target, TARGET_HALTED, timeout_ms);
-       if (target->state != TARGET_HALTED)
-       {
-               if ((retval=target_halt(target))!=ERROR_OK)
-                       return retval;
-               if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK)
-               {
-                       return retval;
-               }
-               return ERROR_TARGET_TIMEOUT;
-       }
+       retval = armv7m_run_and_wait(target, entry_point, timeout_ms, exit_point, armv7m);
 
+       breakpoint_remove(target, exit_point);
 
-       armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
-       if (pc != exit_point)
+       if (retval != ERROR_OK)
        {
-               LOG_DEBUG("failed algoritm halted at 0x%x ", pc);
-               return ERROR_TARGET_TIMEOUT;
+               return retval;
        }
 
-       breakpoint_remove(target, exit_point);
-
        /* Read memory values to mem_params[] */
        for (i = 0; i < num_mem_params; i++)
        {
                if (mem_params[i].direction != PARAM_OUT)
-                       target_read_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value);
+                       if((retval = target_read_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value)) != ERROR_OK)
+                       {
+                               return retval;
+                       }
        }
 
        /* Copy core register values to reg_params[] */
@@ -575,7 +596,10 @@ int armv7m_checksum_memory(struct target_s *target, u32 address, u32 count, u32*
 
        /* convert flash writing code into a buffer in target endianness */
        for (i = 0; i < (sizeof(cortex_m3_crc_code)/sizeof(u16)); i++)
-               target_write_u16(target, crc_algorithm->address + i*sizeof(u16), cortex_m3_crc_code[i]);
+               if((retval = target_write_u16(target, crc_algorithm->address + i*sizeof(u16), cortex_m3_crc_code[i])) != ERROR_OK)
+               {
+                       return retval;
+               }
 
        armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
        armv7m_info.core_mode = ARMV7M_MODE_ANY;
@@ -617,12 +641,12 @@ int armv7m_blank_check_memory(struct target_s *target, u32 address, u32 count, u
        u16 erase_check_code[] =
        {
                                                        /* loop: */
-                0xF810, 0x3B01,        /* ldrb         r3, [r0], #1 */
-                0xEA02, 0x0203,        /* and  r2, r2, r3 */
-                0x3901,                        /* subs         r1, r1, #1 */
-                0xD1F9,                        /* bne          loop */
-                                                       /* end: */
-                0xE7FE,                        /* b            end */
+               0xF810, 0x3B01,         /* ldrb         r3, [r0], #1 */
+               0xEA02, 0x0203,         /* and  r2, r2, r3 */
+               0x3901,                         /* subs         r1, r1, #1 */
+               0xD1F9,                         /* bne          loop */
+                                                       /* end: */
+               0xE7FE,                         /* b            end */
        };
 
        /* make sure we have a working area */