improve mips32_pracc_context

[fw/openocd] / src / target / armv7a.h

diff --git a/src/target/armv7a.h b/src/target/armv7a.h
index d92e5bca05e04d149d1a5877597c5e2b76dbf0fd..c775d0c24debee287f4332c666e6352a5c5cd284 100644 (file)
--- a/src/target/armv7a.h
+++ b/src/target/armv7a.h
@@ -79,18 +79,34 @@ enum
 #define ARMV4_5_COMMON_MAGIC 0x0A450A45
 #define ARMV7_COMMON_MAGIC 0x0A450999
 
-typedef struct armv7a_common_s
+/* VA to PA translation operations opc2 values*/
+#define V2PCWPR  0
+#define V2PCWPW  1
+#define V2PCWUR  2
+#define V2PCWUW  3
+#define V2POWPR  4
+#define V2POWPW  5
+#define V2POWUR  6
+#define V2POWUW  7
+
+struct armv7a_common
 {
        int common_magic;
-       reg_cache_t *core_cache;
+       struct reg_cache *core_cache;
        enum armv7a_mode core_mode;
        enum armv7a_state core_state;
 
        /* arm adp debug port */
-       swjdp_common_t swjdp_info;
-       armv4_5_mmu_common_t armv4_5_mmu;
-       armv4_5_common_t armv4_5_common;
-       void *arch_info;
+       struct swjdp_common swjdp_info;
+
+       /* Core Debug Unit */
+       uint32_t debug_base;
+       uint8_t debug_ap;
+       uint8_t memory_ap;
+
+       /* Cache and Memory Management Unit */
+       struct armv4_5_mmu_common armv4_5_mmu;
+       struct arm armv4_5_common;
 
 //     int (*full_context)(struct target_s *target);
 //     int (*read_core_reg)(struct target_s *target, int num, enum armv7a_mode mode);
@@ -103,35 +119,41 @@ typedef struct armv7a_common_s
                        uint32_t CRn, uint32_t CRm, uint32_t value);
 
        int (*examine_debug_reason)(target_t *target);
-       void (*pre_debug_entry)(target_t *target);
        void (*post_debug_entry)(target_t *target);
 
        void (*pre_restore_context)(target_t *target);
        void (*post_restore_context)(target_t *target);
 
-} armv7a_common_t;
+};
+
+static inline struct armv7a_common *
+target_to_armv7a(struct target_s *target)
+{
+       return container_of(target->arch_info, struct armv7a_common,
+                       armv4_5_common);
+}
 
-typedef struct armv7a_algorithm_s
+struct armv7a_algorithm
 {
        int common_magic;
 
        enum armv7a_mode core_mode;
        enum armv7a_state core_state;
-} armv7a_algorithm_t;
+};
 
-typedef struct armv7a_core_reg_s
+struct armv7a_core_reg
 {
        int num;
        enum armv7a_mode mode;
        target_t *target;
-       armv7a_common_t *armv7a_common;
-} armv7a_core_reg_t;
+       struct armv7a_common *armv7a_common;
+};
 
 int armv7a_arch_state(struct target_s *target);
-reg_cache_t *armv7a_build_reg_cache(target_t *target,
-               armv7a_common_t *armv7a_common);
+struct reg_cache *armv7a_build_reg_cache(target_t *target,
+               struct armv7a_common *armv7a_common);
 int armv7a_register_commands(struct command_context_s *cmd_ctx);
-int armv7a_init_arch_info(target_t *target, armv7a_common_t *armv7a);
+int armv7a_init_arch_info(target_t *target, struct armv7a_common *armv7a);
 
 /* map psr mode bits to linear number */
 static inline int armv7a_mode_to_number(enum armv7a_mode mode)
@@ -148,7 +170,7 @@ static inline int armv7a_mode_to_number(enum armv7a_mode mode)
                case ARMV7A_MODE_MON: return 7; break;
                case ARMV7A_MODE_ANY: return 0; break;  /* map MODE_ANY to user mode */
                default:
-                       LOG_ERROR("invalid mode value encountered");
+                       LOG_ERROR("invalid mode value encountered, val %d", mode);
                        return -1;
        }
 }