#define V2POWUR 6
#define V2POWUW 7
-typedef struct armv7a_common_s
+struct armv7a_common
{
int common_magic;
- reg_cache_t *core_cache;
+ struct reg_cache *core_cache;
enum armv7a_mode core_mode;
enum armv7a_state core_state;
/* arm adp debug port */
- swjdp_common_t swjdp_info;
+ struct swjdp_common swjdp_info;
/* Core Debug Unit */
uint32_t debug_base;
uint8_t memory_ap;
/* Cache and Memory Management Unit */
- armv4_5_mmu_common_t armv4_5_mmu;
- armv4_5_common_t armv4_5_common;
+ struct armv4_5_mmu_common armv4_5_mmu;
+ struct arm armv4_5_common;
-// int (*full_context)(struct target_s *target);
-// int (*read_core_reg)(struct target_s *target, int num, enum armv7a_mode mode);
-// int (*write_core_reg)(struct target_s *target, int num, enum armv7a_mode mode, u32 value);
- int (*read_cp15)(struct target_s *target,
+// int (*full_context)(struct target *target);
+// int (*read_core_reg)(struct target *target, int num, enum armv7a_mode mode);
+// int (*write_core_reg)(struct target *target, int num, enum armv7a_mode mode, u32 value);
+ int (*read_cp15)(struct target *target,
uint32_t op1, uint32_t op2,
uint32_t CRn, uint32_t CRm, uint32_t *value);
- int (*write_cp15)(struct target_s *target,
+ int (*write_cp15)(struct target *target,
uint32_t op1, uint32_t op2,
uint32_t CRn, uint32_t CRm, uint32_t value);
- int (*examine_debug_reason)(target_t *target);
- void (*post_debug_entry)(target_t *target);
+ int (*examine_debug_reason)(struct target *target);
+ void (*post_debug_entry)(struct target *target);
- void (*pre_restore_context)(target_t *target);
- void (*post_restore_context)(target_t *target);
+ void (*pre_restore_context)(struct target *target);
+ void (*post_restore_context)(struct target *target);
-} armv7a_common_t;
+};
-static inline struct armv7a_common_s *
-target_to_armv7a(struct target_s *target)
+static inline struct armv7a_common *
+target_to_armv7a(struct target *target)
{
- return container_of(target->arch_info, struct armv7a_common_s,
+ return container_of(target->arch_info, struct armv7a_common,
armv4_5_common);
}
-typedef struct armv7a_algorithm_s
+struct armv7a_algorithm
{
int common_magic;
enum armv7a_mode core_mode;
enum armv7a_state core_state;
-} armv7a_algorithm_t;
+};
-typedef struct armv7a_core_reg_s
+struct armv7a_core_reg
{
int num;
enum armv7a_mode mode;
- target_t *target;
- armv7a_common_t *armv7a_common;
-} armv7a_core_reg_t;
+ struct target *target;
+ struct armv7a_common *armv7a_common;
+};
-int armv7a_arch_state(struct target_s *target);
-reg_cache_t *armv7a_build_reg_cache(target_t *target,
- armv7a_common_t *armv7a_common);
+int armv7a_arch_state(struct target *target);
+struct reg_cache *armv7a_build_reg_cache(struct target *target,
+ struct armv7a_common *armv7a_common);
int armv7a_register_commands(struct command_context_s *cmd_ctx);
-int armv7a_init_arch_info(target_t *target, armv7a_common_t *armv7a);
+int armv7a_init_arch_info(struct target *target, struct armv7a_common *armv7a);
/* map psr mode bits to linear number */
static inline int armv7a_mode_to_number(enum armv7a_mode mode)