target/smp: use a struct list_head to hold the smp targets

[fw/openocd] / src / target / armv7a.c

diff --git a/src/target/armv7a.c b/src/target/armv7a.c
index 5c9f3085c35a33bfa9e7dc77ba963e7e8ed2c109..d564f19ae79052e912a0eb61977fc88de16e53bb 100644 (file)
--- a/src/target/armv7a.c
+++ b/src/target/armv7a.c
@@ -38,6 +38,7 @@
 #include "arm_opcodes.h"
 #include "target.h"
 #include "target_type.h"
+#include "smp.h"
 
 static void armv7a_show_fault_registers(struct target *target)
 {
@@ -50,7 +51,7 @@ static void armv7a_show_fault_registers(struct target *target)
        if (retval != ERROR_OK)
                return;
 
-       /* ARMV4_5_MRC(cpnum, op1, r0, CRn, CRm, op2) */
+       /* ARMV4_5_MRC(cpnum, op1, r0, crn, crm, op2) */
 
        /* c5/c0 - {data, instruction} fault status registers */
        retval = dpm->instr_read_data_r0(dpm,
@@ -193,8 +194,7 @@ done:
 static int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t way)
 {
        struct armv7a_l2x_cache *l2x_cache;
-       struct target_list *head = target->head;
-       struct target *curr;
+       struct target_list *head;
 
        struct armv7a_common *armv7a = target_to_armv7a(target);
        l2x_cache = calloc(1, sizeof(struct armv7a_l2x_cache));
@@ -207,15 +207,14 @@ static int armv7a_l2x_cache_init(struct target *target, uint32_t base, uint32_t
        armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
        /*  initialize all target in this cluster (smp target)
         *  l2 cache must be configured after smp declaration */
-       while (head != (struct target_list *)NULL) {
-               curr = head->target;
+       foreach_smp_target(head, target->smp_targets) {
+               struct target *curr = head->target;
                if (curr != target) {
                        armv7a = target_to_armv7a(curr);
                        if (armv7a->armv7a_mmu.armv7a_cache.outer_cache)
                                LOG_ERROR("smp target : outer cache already initialized\n");
                        armv7a->armv7a_mmu.armv7a_cache.outer_cache = l2x_cache;
                }
-               head = head->next;
        }
        return JIM_OK;
 }
@@ -282,7 +281,7 @@ int armv7a_handle_cache_info_command(struct command_invocation *cmd,
                }
        }
 
-       if (l2x_cache != NULL)
+       if (l2x_cache)
                command_print(cmd, "Outer unified cache Base Address 0x%" PRIx32 ", %" PRIu32 " ways",
                        l2x_cache->base, l2x_cache->way);
 
@@ -483,7 +482,7 @@ int armv7a_identify_cache(struct target *target)
                goto done;
 
        /*  if no l2 cache initialize l1 data cache flush function function */
-       if (armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache == NULL) {
+       if (!armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache) {
                armv7a->armv7a_mmu.armv7a_cache.flush_all_data_cache =
                        armv7a_cache_auto_flush_all_data;
        }
@@ -570,8 +569,6 @@ int armv7a_arch_state(struct target *target)
 
        if (arm->core_mode == ARM_MODE_ABT)
                armv7a_show_fault_registers(target);
-       if (target->debug_reason == DBG_REASON_WATCHPOINT)
-               LOG_USER("Watchpoint triggered at PC " TARGET_ADDR_FMT, armv7a->dpm.wp_addr);
 
        return ERROR_OK;
 }