ARM720 uses the new inheritance/nesting scheme
[fw/openocd] / src / target / armv7a.c
index 3eb0f3ed355949c9bf7de90c4028f56a8b48e769..1583e995f63efa78bcef52f8beab6a0017cc428c 100644 (file)
@@ -70,8 +70,8 @@ char* armv7a_core_reg_list[] =
 
 char * armv7a_mode_strings_list[] =
 {
-       "Illegal mode value", "System and User", "FIQ", "IRQ",
-       "Supervisor", "Abort", "Undefined", "Monitor"
+       "Illegal mode value", "User", "FIQ", "IRQ",
+       "Supervisor", "Abort", "Undefined", "System", "Monitor"
 };
 
 /* Hack! Yuk! allow -1 index, which simplifies codepaths elsewhere in the code */
@@ -173,6 +173,26 @@ reg_t armv7a_gdb_dummy_fp_reg =
                        0, 1, 96, NULL, 0, NULL, 0
 };
 
+void armv7a_show_fault_registers(target_t *target)
+{
+       uint32_t dfsr, ifsr, dfar, ifar;
+
+       /* get pointers to arch-specific information */
+       armv4_5_common_t *armv4_5 = target->arch_info;
+       armv7a_common_t *armv7a = armv4_5->arch_info;
+
+       armv7a->read_cp15(target, 0, 0, 5, 0, &dfsr);
+       armv7a->read_cp15(target, 0, 1, 5, 0, &ifsr);
+       armv7a->read_cp15(target, 0, 0, 6, 0, &dfar);
+       armv7a->read_cp15(target, 0, 2, 6, 0, &ifar);
+
+       LOG_USER("Data fault registers        DFSR: %8.8" PRIx32
+                       ", DFAR: %8.8" PRIx32, dfsr, dfar);
+       LOG_USER("Instruction fault registers IFSR: %8.8" PRIx32
+                       ", IFAR: %8.8" PRIx32, ifsr, ifar);
+
+}
+
 int armv7a_arch_state(struct target_s *target)
 {
        static const char *state[] =
@@ -192,7 +212,7 @@ int armv7a_arch_state(struct target_s *target)
        LOG_USER("target halted in %s state due to %s, current mode: %s\n"
                         "%s: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
                         "MMU: %s, D-Cache: %s, I-Cache: %s",
-                armv7a_state_strings[armv4_5->core_state],
+                armv7a_state_strings[armv7a->core_state],
                 Jim_Nvp_value2name_simple(nvp_target_debug_reason,
                                target->debug_reason)->name,
                 armv7a_mode_strings[
@@ -206,6 +226,9 @@ int armv7a_arch_state(struct target_s *target)
                 state[armv7a->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
                 state[armv7a->armv4_5_mmu.armv4_5_cache.i_cache_enabled]);
 
+       if (armv4_5->core_mode == ARMV7A_MODE_ABT)
+               armv7a_show_fault_registers(target);
+
        return ERROR_OK;
 }
 
@@ -263,9 +286,16 @@ static int handle_dap_info_command(struct command_context_s *cmd_ctx,
        swjdp_common_t *swjdp = &armv7a->swjdp_info;
        uint32_t apsel;
 
-       apsel =  swjdp->apsel;
-       if (argc > 0)
-               apsel = strtoul(args[0], NULL, 0);
+       switch (argc) {
+       case 0:
+               apsel = swjdp->apsel;
+               break;
+       case 1:
+               COMMAND_PARSE_NUMBER(u32, args[0], apsel);
+               break;
+       default:
+               return ERROR_COMMAND_SYNTAX_ERROR;
+       }
 
        return dap_info_command(cmd_ctx, swjdp, apsel);
 }
@@ -297,10 +327,10 @@ handle_armv7a_disassemble_command(struct command_context_s *cmd_ctx,
                thumb = 1;
                /* FALL THROUGH */
        case 2:
-               count = strtoul(args[1], NULL, 0);
+               COMMAND_PARSE_NUMBER(int, args[1], count);
                /* FALL THROUGH */
        case 1:
-               address = strtoul(args[0], NULL, 0);
+               COMMAND_PARSE_NUMBER(u32, args[0], address);
                if (address & 0x01) {
                        if (!thumb) {
                                command_print(cmd_ctx, "Disassemble as Thumb");