#include "config.h"
#endif
-#include "replacements.h"
+#include <helper/replacements.h>
#include "armv7a.h"
#include "arm_disassembler.h"
#include "register.h"
-#include "binarybuffer.h"
-#include "command.h"
+#include <helper/binarybuffer.h>
+#include <helper/command.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
+#include "arm_opcodes.h"
-char* armv7a_core_reg_list[] =
-{
- "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
- "r8", "r9", "r10", "r11", "r12", "r13_usr", "lr_usr", "pc",
- "r8_fiq", "r9_fiq", "r10_fiq", "r11_fiq", "r12_fiq", "r13_fiq", "lr_fiq",
- "r13_irq", "lr_irq",
- "r13_svc", "lr_svc",
- "r13_abt", "lr_abt",
- "r13_und", "lr_und",
- "cpsr", "spsr_fiq", "spsr_irq", "spsr_svc", "spsr_abt", "spsr_und",
- "r13_mon", "lr_mon", "spsr_mon"
-};
-
-char * armv7a_mode_strings_list[] =
-{
- "Illegal mode value", "User", "FIQ", "IRQ",
- "Supervisor", "Abort", "Undefined", "System", "Monitor"
-};
-
-/* Hack! Yuk! allow -1 index, which simplifies codepaths elsewhere in the code */
-char** armv7a_mode_strings = armv7a_mode_strings_list+1;
-
-char* armv7a_state_strings[] =
-{
- "ARM", "Thumb", "Jazelle", "ThumbEE"
-};
-
-struct armv7a_core_reg armv7a_core_reg_list_arch_info[] =
-{
- {0, ARMV4_5_MODE_ANY, NULL, NULL},
- {1, ARMV4_5_MODE_ANY, NULL, NULL},
- {2, ARMV4_5_MODE_ANY, NULL, NULL},
- {3, ARMV4_5_MODE_ANY, NULL, NULL},
- {4, ARMV4_5_MODE_ANY, NULL, NULL},
- {5, ARMV4_5_MODE_ANY, NULL, NULL},
- {6, ARMV4_5_MODE_ANY, NULL, NULL},
- {7, ARMV4_5_MODE_ANY, NULL, NULL},
- {8, ARMV4_5_MODE_ANY, NULL, NULL},
- {9, ARMV4_5_MODE_ANY, NULL, NULL},
- {10, ARMV4_5_MODE_ANY, NULL, NULL},
- {11, ARMV4_5_MODE_ANY, NULL, NULL},
- {12, ARMV4_5_MODE_ANY, NULL, NULL},
- {13, ARMV4_5_MODE_USR, NULL, NULL},
- {14, ARMV4_5_MODE_USR, NULL, NULL},
- {15, ARMV4_5_MODE_ANY, NULL, NULL},
-
- {8, ARMV4_5_MODE_FIQ, NULL, NULL},
- {9, ARMV4_5_MODE_FIQ, NULL, NULL},
- {10, ARMV4_5_MODE_FIQ, NULL, NULL},
- {11, ARMV4_5_MODE_FIQ, NULL, NULL},
- {12, ARMV4_5_MODE_FIQ, NULL, NULL},
- {13, ARMV4_5_MODE_FIQ, NULL, NULL},
- {14, ARMV4_5_MODE_FIQ, NULL, NULL},
-
- {13, ARMV4_5_MODE_IRQ, NULL, NULL},
- {14, ARMV4_5_MODE_IRQ, NULL, NULL},
-
- {13, ARMV4_5_MODE_SVC, NULL, NULL},
- {14, ARMV4_5_MODE_SVC, NULL, NULL},
-
- {13, ARMV4_5_MODE_ABT, NULL, NULL},
- {14, ARMV4_5_MODE_ABT, NULL, NULL},
-
- {13, ARMV4_5_MODE_UND, NULL, NULL},
- {14, ARMV4_5_MODE_UND, NULL, NULL},
-
- {16, ARMV4_5_MODE_ANY, NULL, NULL},
- {16, ARMV4_5_MODE_FIQ, NULL, NULL},
- {16, ARMV4_5_MODE_IRQ, NULL, NULL},
- {16, ARMV4_5_MODE_SVC, NULL, NULL},
- {16, ARMV4_5_MODE_ABT, NULL, NULL},
- {16, ARMV4_5_MODE_UND, NULL, NULL},
-
- {13, ARMV7A_MODE_MON, NULL, NULL},
- {14, ARMV7A_MODE_MON, NULL, NULL},
- {16, ARMV7A_MODE_MON, NULL, NULL}
-};
-
-/* map core mode (USR, FIQ, ...) and register number to indizes into the register cache */
-int armv7a_core_reg_map[8][17] =
-{
- { /* USR */
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 31
- },
- { /* FIQ */
- 0, 1, 2, 3, 4, 5, 6, 7, 16, 17, 18, 19, 20, 21, 22, 15, 32
- },
- { /* IRQ */
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 23, 24, 15, 33
- },
- { /* SVC */
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 25, 26, 15, 34
- },
- { /* ABT */
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 27, 28, 15, 35
- },
- { /* UND */
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 29, 30, 15, 36
- },
- { /* SYS */
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 31
- },
- { /* MON */
- /* TODO Fix the register mapping for mon, we need r13_mon,
- * r14_mon and spsr_mon
- */
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 31
- }
-};
-/* FIXME this dummy is IDENTICAL to the armv4_5, arm11, and armv7m
- * ones... except for naming/scoping
- */
-uint8_t armv7a_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
-
-struct reg armv7a_gdb_dummy_fp_reg =
-{
- .name = "GDB dummy floating-point register",
- .value = armv7a_gdb_dummy_fp_value,
- .dirty = 0,
- .valid = 1,
- .size = 96,
- .arch_info = NULL,
- .arch_type = 0,
-};
-
-void armv7a_show_fault_registers(struct target *target)
+static void armv7a_show_fault_registers(struct target *target)
{
uint32_t dfsr, ifsr, dfar, ifar;
struct armv7a_common *armv7a = target_to_armv7a(target);
-
- armv7a->read_cp15(target, 0, 0, 5, 0, &dfsr);
- armv7a->read_cp15(target, 0, 1, 5, 0, &ifsr);
- armv7a->read_cp15(target, 0, 0, 6, 0, &dfar);
- armv7a->read_cp15(target, 0, 2, 6, 0, &ifar);
+ struct arm_dpm *dpm = armv7a->armv4_5_common.dpm;
+ int retval;
+
+ retval = dpm->prepare(dpm);
+ if (retval != ERROR_OK)
+ return;
+
+ /* ARMV4_5_MRC(cpnum, op1, r0, CRn, CRm, op2) */
+
+ /* c5/c0 - {data, instruction} fault status registers */
+ retval = dpm->instr_read_data_r0(dpm,
+ ARMV4_5_MRC(15, 0, 0, 5, 0, 0),
+ &dfsr);
+ if (retval != ERROR_OK)
+ goto done;
+
+ retval = dpm->instr_read_data_r0(dpm,
+ ARMV4_5_MRC(15, 0, 0, 5, 0, 1),
+ &ifsr);
+ if (retval != ERROR_OK)
+ goto done;
+
+ /* c6/c0 - {data, instruction} fault address registers */
+ retval = dpm->instr_read_data_r0(dpm,
+ ARMV4_5_MRC(15, 0, 0, 6, 0, 0),
+ &dfar);
+ if (retval != ERROR_OK)
+ goto done;
+
+ retval = dpm->instr_read_data_r0(dpm,
+ ARMV4_5_MRC(15, 0, 0, 6, 0, 2),
+ &ifar);
+ if (retval != ERROR_OK)
+ goto done;
LOG_USER("Data fault registers DFSR: %8.8" PRIx32
", DFAR: %8.8" PRIx32, dfsr, dfar);
LOG_USER("Instruction fault registers IFSR: %8.8" PRIx32
", IFAR: %8.8" PRIx32, ifsr, ifar);
+done:
+ /* (void) */ dpm->finish(dpm);
}
int armv7a_arch_state(struct target *target)
};
struct armv7a_common *armv7a = target_to_armv7a(target);
- struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
+ struct arm *armv4_5 = &armv7a->armv4_5_common;
if (armv7a->common_magic != ARMV7_COMMON_MAGIC)
{
return ERROR_INVALID_ARGUMENTS;
}
- LOG_USER("target halted in %s state due to %s, current mode: %s\n"
- "%s: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
- "MMU: %s, D-Cache: %s, I-Cache: %s",
- armv7a_state_strings[armv7a->core_state],
- Jim_Nvp_value2name_simple(nvp_target_debug_reason,
- target->debug_reason)->name,
- armv7a_mode_strings[
- armv7a_mode_to_number(armv4_5->core_mode)],
- armv7a_core_reg_list[armv7a_core_reg_map[
- armv7a_mode_to_number(armv4_5->core_mode)][16]],
- buf_get_u32(ARMV7A_CORE_REG_MODE(armv4_5->core_cache,
- armv4_5->core_mode, 16).value, 0, 32),
- buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
+ arm_arch_state(target);
+
+ LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s",
state[armv7a->armv4_5_mmu.mmu_enabled],
state[armv7a->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
state[armv7a->armv4_5_mmu.armv4_5_cache.i_cache_enabled]);
- if (armv4_5->core_mode == ARMV7A_MODE_ABT)
+ if (armv4_5->core_mode == ARM_MODE_ABT)
armv7a_show_fault_registers(target);
+ if (target->debug_reason == DBG_REASON_WATCHPOINT)
+ LOG_USER("Watchpoint triggered at PC %#08x",
+ (unsigned) armv7a->dpm.wp_pc);
return ERROR_OK;
}
-COMMAND_HANDLER(handle_dap_baseaddr_command)
-{
- struct target *target = get_current_target(cmd_ctx);
- struct armv7a_common *armv7a = target_to_armv7a(target);
- struct swjdp_common *swjdp = &armv7a->swjdp_info;
-
- return CALL_COMMAND_HANDLER(dap_baseaddr_command, swjdp);
-}
-
-COMMAND_HANDLER(handle_dap_memaccess_command)
-{
- struct target *target = get_current_target(cmd_ctx);
- struct armv7a_common *armv7a = target_to_armv7a(target);
- struct swjdp_common *swjdp = &armv7a->swjdp_info;
-
- return CALL_COMMAND_HANDLER(dap_memaccess_command, swjdp);
-}
-
-COMMAND_HANDLER(handle_dap_apsel_command)
-{
- struct target *target = get_current_target(cmd_ctx);
- struct armv7a_common *armv7a = target_to_armv7a(target);
- struct swjdp_common *swjdp = &armv7a->swjdp_info;
-
- return CALL_COMMAND_HANDLER(dap_apsel_command, swjdp);
-}
-
-COMMAND_HANDLER(handle_dap_apid_command)
-{
- struct target *target = get_current_target(cmd_ctx);
- struct armv7a_common *armv7a = target_to_armv7a(target);
- struct swjdp_common *swjdp = &armv7a->swjdp_info;
-
- return CALL_COMMAND_HANDLER(dap_apid_command, swjdp);
-}
-
-COMMAND_HANDLER(handle_dap_info_command)
-{
- struct target *target = get_current_target(cmd_ctx);
- struct armv7a_common *armv7a = target_to_armv7a(target);
- struct swjdp_common *swjdp = &armv7a->swjdp_info;
- uint32_t apsel;
-
- switch (argc) {
- case 0:
- apsel = swjdp->apsel;
- break;
- case 1:
- COMMAND_PARSE_NUMBER(u32, args[0], apsel);
- break;
- default:
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- return dap_info_command(cmd_ctx, swjdp, apsel);
-}
-
-int armv7a_register_commands(struct command_context *cmd_ctx)
-{
- struct command *arm_adi_v5_dap_cmd;
-
- arm_adi_v5_dap_cmd = register_command(cmd_ctx, NULL, "dap",
- NULL, COMMAND_ANY,
- "cortex dap specific commands");
-
- register_command(cmd_ctx, arm_adi_v5_dap_cmd, "info",
- handle_dap_info_command, COMMAND_EXEC,
- "dap info for ap [num], "
- "default currently selected AP");
- register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apsel",
- handle_dap_apsel_command, COMMAND_EXEC,
- "select a different AP [num] (default 0)");
- register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apid",
- handle_dap_apid_command, COMMAND_EXEC,
- "return id reg from AP [num], "
- "default currently selected AP");
- register_command(cmd_ctx, arm_adi_v5_dap_cmd, "baseaddr",
- handle_dap_baseaddr_command, COMMAND_EXEC,
- "return debug base address from AP [num], "
- "default currently selected AP");
- register_command(cmd_ctx, arm_adi_v5_dap_cmd, "memaccess",
- handle_dap_memaccess_command, COMMAND_EXEC,
- "set/get number of extra tck for mem-ap memory "
- "bus access [0-255]");
+const struct command_registration armv7a_command_handlers[] = {
+ {
+ .chain = dap_command_handlers,
+ },
+ COMMAND_REGISTRATION_DONE
+};
- return ERROR_OK;
-}
projects / fw / openocd / blobdiff