src/target: remove 'extern' and wrap headers

[fw/openocd] / src / target / armv4_5_mmu.h

diff --git a/src/target/armv4_5_mmu.h b/src/target/armv4_5_mmu.h
index 3adb30e22cc15066ba3caf91a45e1bce1f2390fd..b0c39a7a39a4a6da050677a1a77e243435f8b5e3 100644 (file)
--- a/src/target/armv4_5_mmu.h
+++ b/src/target/armv4_5_mmu.h
@@ -21,12 +21,13 @@
 #define ARMV4_5_MMU_H
 
 #include "armv4_5_cache.h"
+#include "target.h"
 
 typedef struct armv4_5_mmu_common_s
 {
-       u32 (*get_ttb)(target_t *target);
-       int (*read_memory)(target_t *target, u32 address, u32 size, u32 count, u8 *buffer);
-       int (*write_memory)(target_t *target, u32 address, u32 size, u32 count, u8 *buffer);
+       uint32_t (*get_ttb)(target_t *target);
+       int (*read_memory)(target_t *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+       int (*write_memory)(target_t *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
        void (*disable_mmu_caches)(target_t *target, int mmu, int d_u_cache, int i_cache);
        void (*enable_mmu_caches)(target_t *target, int mmu, int d_u_cache, int i_cache);
        armv4_5_cache_common_t armv4_5_cache;
@@ -41,12 +42,24 @@ enum
 
 extern char* armv4_5_page_type_names[];
 
-extern u32 armv4_5_mmu_translate_va(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, u32 va, int *type, u32 *cb, int *domain, u32 *ap);
-extern int armv4_5_mmu_read_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, u32 address, u32 size, u32 count, u8 *buffer);
-extern int armv4_5_mmu_write_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, u32 address, u32 size, u32 count, u8 *buffer);
+uint32_t armv4_5_mmu_translate_va(target_t *target,
+               armv4_5_mmu_common_t *armv4_5_mmu, uint32_t va, int *type,
+               uint32_t *cb, int *domain, uint32_t *ap);
 
-extern int armv4_5_mmu_handle_virt2phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu);
-extern int armv4_5_mmu_handle_md_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu);
-extern int armv4_5_mmu_handle_mw_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu);
+int armv4_5_mmu_read_physical(target_t *target,
+               armv4_5_mmu_common_t *armv4_5_mmu,
+               uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+
+int armv4_5_mmu_write_physical(target_t *target,
+               armv4_5_mmu_common_t *armv4_5_mmu,
+               uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+
+enum
+{
+       ARMV4_5_MMU_ENABLED = 0x1,
+       ARMV4_5_ALIGNMENT_CHECK = 0x2,
+       ARMV4_5_MMU_S_BIT = 0x100,
+       ARMV4_5_MMU_R_BIT = 0x200
+};
 
 #endif /* ARMV4_5_MMU_H */