arm_adi_v5: parse ROM tables behind SoC-600 APv1 adapter

[fw/openocd] / src / target / armv4_5_mmu.h

diff --git a/src/target/armv4_5_mmu.h b/src/target/armv4_5_mmu.h
index b64895c6ec1789282f7f518d927e15be742c58cd..7beaf4ee96323669e12abddaa53a7183d62d4af0 100644 (file)
--- a/src/target/armv4_5_mmu.h
+++ b/src/target/armv4_5_mmu.h
@@ -16,8 +16,8 @@
  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
-#ifndef ARMV4_5_MMU_H
-#define ARMV4_5_MMU_H
+#ifndef OPENOCD_TARGET_ARMV4_5_MMU_H
+#define OPENOCD_TARGET_ARMV4_5_MMU_H
 
 #include "armv4_5_cache.h"
 
@@ -25,8 +25,9 @@ struct target;
 
 struct armv4_5_mmu_common {
        int (*get_ttb)(struct target *target, uint32_t *result);
-       int (*read_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-       int (*write_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
+       int (*read_memory)(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+       int (*write_memory)(struct target *target, target_addr_t address,
+                           uint32_t size, uint32_t count, const uint8_t *buffer);
        int (*disable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
        int (*enable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
        struct armv4_5_cache_common armv4_5_cache;
@@ -53,4 +54,4 @@ enum {
        ARMV4_5_MMU_R_BIT = 0x200
 };
 
-#endif /* ARMV4_5_MMU_H */
+#endif /* OPENOCD_TARGET_ARMV4_5_MMU_H */