arm_adi_v5: mem_ap_write error propagation

[fw/openocd] / src / target / armv4_5_cache.h

diff --git a/src/target/armv4_5_cache.h b/src/target/armv4_5_cache.h
index 9a06090d777be6f43b6f5e2cd9cd0785356da6a8..c529b458413345f80f668de6b51eb1a84ec5b933 100644 (file)
--- a/src/target/armv4_5_cache.h
+++ b/src/target/armv4_5_cache.h
@@ -20,9 +20,9 @@
 #ifndef ARMV4_5_CACHE_H
 #define ARMV4_5_CACHE_H
 
-#include "types.h"
+#include <helper/types.h>
 
-struct command_context_s;
+struct command_context;
 
 struct armv4_5_cachesize
 {
@@ -32,7 +32,7 @@ struct armv4_5_cachesize
        int cachesize;
 };
 
-typedef struct armv4_5_cache_common_s
+struct armv4_5_cache_common
 {
        int ctype;      /* specify supported cache operations */
        int separate;   /* separate caches or unified cache */
@@ -40,15 +40,15 @@ typedef struct armv4_5_cache_common_s
        struct armv4_5_cachesize i_size; /* instruction cache */
        int i_cache_enabled;
        int d_u_cache_enabled;
-} armv4_5_cache_common_t;
+};
 
 int armv4_5_identify_cache(uint32_t cache_type_reg,
-               armv4_5_cache_common_t *cache);
+               struct armv4_5_cache_common *cache);
 int armv4_5_cache_state(uint32_t cp15_control_reg,
-               armv4_5_cache_common_t *cache);
+               struct armv4_5_cache_common *cache);
 
-int armv4_5_handle_cache_info_command(struct command_context_s *cmd_ctx,
-               armv4_5_cache_common_t *armv4_5_cache);
+int armv4_5_handle_cache_info_command(struct command_context *cmd_ctx,
+               struct armv4_5_cache_common *armv4_5_cache);
 
 enum
 {