target/cortex_m,hla_target: rework Cortex-M register handling part 4

[fw/openocd] / src / target / armv4_5_cache.h

diff --git a/src/target/armv4_5_cache.h b/src/target/armv4_5_cache.h
index 95273a7d38ecae12c960e0021f54d018b79815eb..768938fd1ff2f1642a6a0bb6af79447213cc63c7 100644 (file)
--- a/src/target/armv4_5_cache.h
+++ b/src/target/armv4_5_cache.h
@@ -13,15 +13,13 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
-#ifndef ARMV4_5_CACHE_H
-#define ARMV4_5_CACHE_H
+#ifndef OPENOCD_TARGET_ARMV4_5_CACHE_H
+#define OPENOCD_TARGET_ARMV4_5_CACHE_H
 
-struct command_context;
+struct command_invocation;
 
 struct armv4_5_cachesize {
        int linelen;
@@ -44,7 +42,7 @@ int armv4_5_identify_cache(uint32_t cache_type_reg,
 int armv4_5_cache_state(uint32_t cp15_control_reg,
                struct armv4_5_cache_common *cache);
 
-int armv4_5_handle_cache_info_command(struct command_context *cmd_ctx,
+int armv4_5_handle_cache_info_command(struct command_invocation *cmd,
                struct armv4_5_cache_common *armv4_5_cache);
 
 enum {
@@ -54,4 +52,4 @@ enum {
        ARMV4_5_CACHE_RR_BIT = 0x5000,
 };
 
-#endif /* ARMV4_5_CACHE_H */
+#endif /* OPENOCD_TARGET_ARMV4_5_CACHE_H */