flash/nor/at91samd: Use 32-bit register writes for ST-Link compat
[fw/openocd] / src / target / armv4_5_cache.h
index fc5e2c7995b15d5f6d1412958b7ac453e2b98a09..3659941e52a722fa91a19e4440b6fd806ef2fc63 100644 (file)
@@ -1,29 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
 /***************************************************************************
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  ***************************************************************************/
 
-#ifndef ARMV4_5_CACHE_H
-#define ARMV4_5_CACHE_H
+#ifndef OPENOCD_TARGET_ARMV4_5_CACHE_H
+#define OPENOCD_TARGET_ARMV4_5_CACHE_H
 
-#include <helper/types.h>
+#include "helper/types.h"
 
-struct command_context;
+struct command_invocation;
 
 struct armv4_5_cachesize {
        int linelen;
@@ -46,7 +33,7 @@ int armv4_5_identify_cache(uint32_t cache_type_reg,
 int armv4_5_cache_state(uint32_t cp15_control_reg,
                struct armv4_5_cache_common *cache);
 
-int armv4_5_handle_cache_info_command(struct command_context *cmd_ctx,
+int armv4_5_handle_cache_info_command(struct command_invocation *cmd,
                struct armv4_5_cache_common *armv4_5_cache);
 
 enum {
@@ -56,4 +43,4 @@ enum {
        ARMV4_5_CACHE_RR_BIT = 0x5000,
 };
 
-#endif /* ARMV4_5_CACHE_H */
+#endif /* OPENOCD_TARGET_ARMV4_5_CACHE_H */