mips_m4k : Fix soft breakpoint endianess handling

[fw/openocd] / src / target / armv4_5_cache.c

diff --git a/src/target/armv4_5_cache.c b/src/target/armv4_5_cache.c
index 793979e51d99cc3108032e0cd7a061f36569fadd..dcbcef3a131947d2ca0941b61244f0d96aac1c45 100644 (file)
--- a/src/target/armv4_5_cache.c
+++ b/src/target/armv4_5_cache.c
@@ -22,7 +22,7 @@
 #endif
 
 #include "armv4_5_cache.h"
-#include "log.h"
+#include <helper/log.h>
 
 int armv4_5_identify_cache(uint32_t cache_type_reg, struct armv4_5_cache_common *cache)
 {
@@ -87,7 +87,7 @@ int armv4_5_identify_cache(uint32_t cache_type_reg, struct armv4_5_cache_common
        return ERROR_OK;
 }
 
-int armv4_5_handle_cache_info_command(struct command_context_s *cmd_ctx, struct armv4_5_cache_common *armv4_5_cache)
+int armv4_5_handle_cache_info_command(struct command_context *cmd_ctx, struct armv4_5_cache_common *armv4_5_cache)
 {
        if (armv4_5_cache->ctype == -1)
        {