target/arm_adi_v5: Fix clear sticky overrun flag during replay of commands

[fw/openocd] / src / target / armv4_5.h

diff --git a/src/target/armv4_5.h b/src/target/armv4_5.h
index 8440f0972a16c6a3f7aef45fee0bb6a0f97b7789..bef1cfe32ae187cbae0668b5569e540b814ba759 100644 (file)
--- a/src/target/armv4_5.h
+++ b/src/target/armv4_5.h
@@ -22,8 +22,8 @@
  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
-#ifndef ARMV4_5_H
-#define ARMV4_5_H
+#ifndef OPENOCD_TARGET_ARMV4_5_H
+#define OPENOCD_TARGET_ARMV4_5_H
 
 /* This stuff "knows" that its callers aren't talking
  * to microcontroller profile (current Cortex-M) parts.
@@ -38,7 +38,7 @@
 int arm_mode_to_number(enum arm_mode mode);
 enum arm_mode armv4_5_number_to_mode(int number);
 
-extern const int armv4_5_core_reg_map[8][17];
+extern const int armv4_5_core_reg_map[9][17];
 
 #define ARMV4_5_CORE_REG_MODE(cache, mode, num) \
                (cache->reg_list[armv4_5_core_reg_map[arm_mode_to_number(mode)][num]])
@@ -46,4 +46,4 @@ extern const int armv4_5_core_reg_map[8][17];
 /* offset into armv4_5 core register cache -- OBSOLETE, DO NOT USE! */
 enum { ARMV4_5_CPSR = 31, };
 
-#endif /* ARMV4_5_H */
+#endif /* OPENOCD_TARGET_ARMV4_5_H */