rtos: Fix XPSR_OFFSET for cortex_m4f stacking

[fw/openocd] / src / target / armv4_5.h

diff --git a/src/target/armv4_5.h b/src/target/armv4_5.h
index f63f5af05db4e8992c46ee4a94e7f60758733888..3ce4ed0e56ca7089542aa5f76c878125c4ac8537 100644 (file)
--- a/src/target/armv4_5.h
+++ b/src/target/armv4_5.h
@@ -19,13 +19,11 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
-#ifndef ARMV4_5_H
-#define ARMV4_5_H
+#ifndef OPENOCD_TARGET_ARMV4_5_H
+#define OPENOCD_TARGET_ARMV4_5_H
 
 /* This stuff "knows" that its callers aren't talking
  * to microcontroller profile (current Cortex-M) parts.
@@ -48,4 +46,4 @@ extern const int armv4_5_core_reg_map[8][17];
 /* offset into armv4_5 core register cache -- OBSOLETE, DO NOT USE! */
 enum { ARMV4_5_CPSR = 31, };
 
-#endif /* ARMV4_5_H */
+#endif /* OPENOCD_TARGET_ARMV4_5_H */