openocd: fix SPDX tag format for files .c

[fw/openocd] / src / target / armv4_5.c

diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 2759b4633af90094cf9d1b83d78d7889620ce90f..48af5035a08f4b30c0e981a5fac695a12bf64028 100644 (file)
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
 
 /***************************************************************************
  *   Copyright (C) 2005 by Dominic Rath                                    *
@@ -535,7 +535,7 @@ static struct reg_feature arm_gdb_dummy_fp_features = {
  * Modern ARM cores use Vector Floating Point (VFP), if they
  * have any floating point support.  VFP is not FPA-compatible.
  */
-struct reg arm_gdb_dummy_fp_reg = {
+static struct reg arm_gdb_dummy_fp_reg = {
        .name = "GDB dummy FPA register",
        .value = (uint8_t *) arm_gdb_dummy_fp_value,
        .valid = true,
@@ -552,7 +552,7 @@ static const uint8_t arm_gdb_dummy_fps_value[4];
  * Dummy FPA status registers are required to support GDB on ARM.
  * Register packets require an obsolete FPA status register.
  */
-struct reg arm_gdb_dummy_fps_reg = {
+static struct reg arm_gdb_dummy_fps_reg = {
        .name = "GDB dummy FPA status register",
        .value = (uint8_t *) arm_gdb_dummy_fps_value,
        .valid = true,
@@ -905,32 +905,33 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
        return ERROR_OK;
 }
 
-COMMAND_HANDLER(handle_armv4_5_core_state_command)
+COMMAND_HANDLER(handle_arm_core_state_command)
 {
        struct target *target = get_current_target(CMD_CTX);
        struct arm *arm = target_to_arm(target);
+       int ret = ERROR_OK;
 
        if (!is_arm(arm)) {
                command_print(CMD, "current target isn't an ARM");
                return ERROR_FAIL;
        }
 
-       if (arm->core_type == ARM_CORE_TYPE_M_PROFILE) {
-               /* armv7m not supported */
-               command_print(CMD, "Unsupported Command");
-               return ERROR_OK;
-       }
-
        if (CMD_ARGC > 0) {
-               if (strcmp(CMD_ARGV[0], "arm") == 0)
-                       arm->core_state = ARM_STATE_ARM;
+               if (strcmp(CMD_ARGV[0], "arm") == 0) {
+                       if (arm->core_type == ARM_CORE_TYPE_M_PROFILE) {
+                               command_print(CMD, "arm mode not supported on Cortex-M");
+                               ret = ERROR_FAIL;
+                       } else {
+                               arm->core_state = ARM_STATE_ARM;
+                       }
+               }
                if (strcmp(CMD_ARGV[0], "thumb") == 0)
                        arm->core_state = ARM_STATE_THUMB;
        }
 
        command_print(CMD, "core state: %s", arm_state_strings[arm->core_state]);
 
-       return ERROR_OK;
+       return ret;
 }
 
 COMMAND_HANDLER(handle_arm_disassemble_command)
@@ -1116,8 +1117,6 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
        return JIM_OK;
 }
 
-extern const struct command_registration semihosting_common_handlers[];
-
 static const struct command_registration arm_exec_command_handlers[] = {
        {
                .name = "reg",
@@ -1126,20 +1125,6 @@ static const struct command_registration arm_exec_command_handlers[] = {
                .help = "display ARM core registers",
                .usage = "",
        },
-       {
-               .name = "core_state",
-               .handler = handle_armv4_5_core_state_command,
-               .mode = COMMAND_EXEC,
-               .usage = "['arm'|'thumb']",
-               .help = "display/change ARM core state",
-       },
-       {
-               .name = "disassemble",
-               .handler = handle_arm_disassemble_command,
-               .mode = COMMAND_EXEC,
-               .usage = "address [count ['thumb']]",
-               .help = "disassemble instructions",
-       },
        {
                .name = "mcr",
                .mode = COMMAND_EXEC,
@@ -1154,11 +1139,33 @@ static const struct command_registration arm_exec_command_handlers[] = {
                .help = "read coprocessor register",
                .usage = "cpnum op1 CRn CRm op2",
        },
+       {
+               .chain = arm_all_profiles_command_handlers,
+       },
+       COMMAND_REGISTRATION_DONE
+};
+
+const struct command_registration arm_all_profiles_command_handlers[] = {
+       {
+               .name = "core_state",
+               .handler = handle_arm_core_state_command,
+               .mode = COMMAND_EXEC,
+               .usage = "['arm'|'thumb']",
+               .help = "display/change ARM core state",
+       },
+       {
+               .name = "disassemble",
+               .handler = handle_arm_disassemble_command,
+               .mode = COMMAND_EXEC,
+               .usage = "address [count ['thumb']]",
+               .help = "disassemble instructions",
+       },
        {
                .chain = semihosting_common_handlers,
        },
        COMMAND_REGISTRATION_DONE
 };
+
 const struct command_registration arm_command_handlers[] = {
        {
                .name = "arm",