cmd: add missing usage vars

[fw/openocd] / src / target / armv4_5.c

diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index eeb6694c93c28fd1590425ba409de19be51b4a63..3e3fea03ccc56d867c885e0d401c0fd90c411975 100644 (file)
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -612,7 +612,6 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
 {
        struct target *target = get_current_target(CMD_CTX);
        struct arm *armv4_5 = target_to_arm(target);
-       unsigned num_regs;
        struct reg *regs;
 
        if (!is_arm(armv4_5))
@@ -634,7 +633,10 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
        }
 
        if (!is_arm_mode(armv4_5->core_mode))
+       {
+               LOG_ERROR("not a valid arm core mode - communication failure?");
                return ERROR_FAIL;
+       }
 
        if (!armv4_5->full_context) {
                command_print(CMD_CTX, "error: target doesn't support %s",
@@ -642,7 +644,6 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
                return ERROR_FAIL;
        }
 
-       num_regs = armv4_5->core_cache->num_regs;
        regs = armv4_5->core_cache->reg_list;
 
        for (unsigned mode = 0; mode < ARRAY_SIZE(arm_mode_data); mode++) {
@@ -740,7 +741,13 @@ COMMAND_HANDLER(handle_arm_disassemble_command)
 {
        int retval = ERROR_OK;
        struct target *target = get_current_target(CMD_CTX);
-       struct arm *arm = target ? target_to_arm(target) : NULL;
+
+       if (target == NULL) {
+               LOG_ERROR("No target selected");
+               return ERROR_FAIL;
+       }
+
+       struct arm *arm = target_to_arm(target);
        uint32_t address;
        int count = 1;
        int thumb = 0;
@@ -777,10 +784,8 @@ COMMAND_HANDLER(handle_arm_disassemble_command)
                break;
        default:
 usage:
-               command_print(CMD_CTX,
-                       "usage: arm disassemble <address> [<count> ['thumb']]");
                count = 0;
-               retval = ERROR_FAIL;
+               retval = ERROR_COMMAND_SYNTAX_ERROR;
        }
 
        while (count-- > 0) {
@@ -820,11 +825,9 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
        struct arm *arm;
        int retval;
 
-       context = Jim_GetAssocData(interp, "context");
-       if (context == NULL) {
-               LOG_ERROR("%s: no command context", __func__);
-               return JIM_ERR;
-       }
+       context = current_command_context(interp);
+       assert( context != NULL);
+
        target = get_current_target(context);
        if (target == NULL) {
                LOG_ERROR("%s: no current target", __func__);
@@ -947,7 +950,13 @@ static int jim_mcrmrc(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
 COMMAND_HANDLER(handle_arm_semihosting_command)
 {
        struct target *target = get_current_target(CMD_CTX);
-       struct arm *arm = target ? target_to_arm(target) : NULL;
+
+       if (target == NULL) {
+               LOG_ERROR("No target selected");
+               return ERROR_FAIL;
+       }
+
+       struct arm *arm = target_to_arm(target);
 
        if (!is_arm(arm)) {
                command_print(CMD_CTX, "current target isn't an ARM");
@@ -957,6 +966,7 @@ COMMAND_HANDLER(handle_arm_semihosting_command)
        if (!arm->setup_semihosting)
        {
                command_print(CMD_CTX, "semihosting not supported for current target");
+               return ERROR_FAIL;
        }
 
        if (CMD_ARGC > 0)
@@ -993,6 +1003,7 @@ static const struct command_registration arm_exec_command_handlers[] = {
                .handler = handle_armv4_5_reg_command,
                .mode = COMMAND_EXEC,
                .help = "display ARM core registers",
+               .usage = "",
        },
        {
                .name = "core_state",
@@ -1036,6 +1047,7 @@ const struct command_registration arm_command_handlers[] = {
                .name = "arm",
                .mode = COMMAND_ANY,
                .help = "ARM command group",
+               .usage = "",
                .chain = arm_exec_command_handlers,
        },
        COMMAND_REGISTRATION_DONE
@@ -1048,7 +1060,10 @@ int arm_get_gdb_reg_list(struct target *target,
        int i;
 
        if (!is_arm_mode(armv4_5->core_mode))
+       {
+               LOG_ERROR("not a valid arm core mode - communication failure?");
                return ERROR_FAIL;
+       }
 
        *reg_list_size = 26;
        *reg_list = malloc(sizeof(struct reg*) * (*reg_list_size));
@@ -1129,7 +1144,10 @@ int armv4_5_run_algorithm_inner(struct target *target,
        }
 
        if (!is_arm_mode(armv4_5->core_mode))
+       {
+               LOG_ERROR("not a valid arm core mode - communication failure?");
                return ERROR_FAIL;
+       }
 
        /* armv5 and later can terminate with BKPT instruction; less overhead */
        if (!exit_point && armv4_5->is_armv4)
@@ -1168,13 +1186,13 @@ int armv4_5_run_algorithm_inner(struct target *target,
                if (!reg)
                {
                        LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
-                       return ERROR_INVALID_ARGUMENTS;
+                       return ERROR_COMMAND_SYNTAX_ERROR;
                }
 
                if (reg->size != reg_params[i].size)
                {
                        LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
-                       return ERROR_INVALID_ARGUMENTS;
+                       return ERROR_COMMAND_SYNTAX_ERROR;
                }
 
                if ((retval = armv4_5_set_core_reg(reg, reg_params[i].value)) != ERROR_OK)
@@ -1191,7 +1209,7 @@ int armv4_5_run_algorithm_inner(struct target *target,
        else
        {
                LOG_ERROR("BUG: can't execute algorithms when not in ARM or Thumb state");
-               return ERROR_INVALID_ARGUMENTS;
+               return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
        if (arm_algorithm_info->core_mode != ARM_MODE_ANY)
@@ -1243,14 +1261,14 @@ int armv4_5_run_algorithm_inner(struct target *target,
                        if (!reg)
                        {
                                LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
-                               retval = ERROR_INVALID_ARGUMENTS;
+                               retval = ERROR_COMMAND_SYNTAX_ERROR;
                                continue;
                        }
 
                        if (reg->size != reg_params[i].size)
                        {
                                LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
-                               retval = ERROR_INVALID_ARGUMENTS;
+                               retval = ERROR_COMMAND_SYNTAX_ERROR;
                                continue;
                        }
 
@@ -1288,16 +1306,19 @@ int armv4_5_run_algorithm(struct target *target, int num_mem_params, struct mem_
 /**
  * Runs ARM code in the target to calculate a CRC32 checksum.
  *
- * \todo On ARMv5+, rely on BKPT termination for reduced overhead.
  */
 int arm_checksum_memory(struct target *target,
                uint32_t address, uint32_t count, uint32_t *checksum)
 {
        struct working_area *crc_algorithm;
        struct arm_algorithm armv4_5_info;
+       struct arm *armv4_5 = target_to_arm(target);
        struct reg_param reg_params[2];
        int retval;
        uint32_t i;
+       uint32_t exit_var = 0;
+
+       /* see contib/loaders/checksum/armv4_5_crc.s for src */
 
        static const uint32_t arm_crc_code[] = {
                0xE1A02000,             /* mov          r2, r0 */
@@ -1323,7 +1344,7 @@ int arm_checksum_memory(struct target *target,
                0xE1540003,             /* cmp          r4, r3 */
                0x1AFFFFF1,             /* bne          nbyte */
                /* end: */
-               0xEAFFFFFE,             /* b            end */
+               0xe1200070,             /* bkpt         #0 */
                /* CRC32XOR: */
                0x04C11DB7              /* .word 0x04C11DB7 */
        };
@@ -1355,9 +1376,13 @@ int arm_checksum_memory(struct target *target,
        /* 20 second timeout/megabyte */
        int timeout = 20000 * (1 + (count / (1024 * 1024)));
 
+       /* armv4 must exit using a hardware breakpoint */
+       if (armv4_5->is_armv4)
+               exit_var = crc_algorithm->address + sizeof(arm_crc_code) - 8;
+
        retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
                        crc_algorithm->address,
-                       crc_algorithm->address + sizeof(arm_crc_code) - 8,
+                       exit_var,
                        timeout, &armv4_5_info);
        if (retval != ERROR_OK) {
                LOG_ERROR("error executing ARM crc algorithm");
@@ -1382,7 +1407,6 @@ int arm_checksum_memory(struct target *target,
  * all ones.  NOR flash which has been erased, and thus may be written,
  * holds all ones.
  *
- * \todo On ARMv5+, rely on BKPT termination for reduced overhead.
  */
 int arm_blank_check_memory(struct target *target,
                uint32_t address, uint32_t count, uint32_t *blank)
@@ -1390,8 +1414,10 @@ int arm_blank_check_memory(struct target *target,
        struct working_area *check_algorithm;
        struct reg_param reg_params[3];
        struct arm_algorithm armv4_5_info;
+       struct arm *armv4_5 = target_to_arm(target);
        int retval;
        uint32_t i;
+       uint32_t exit_var = 0;
 
        static const uint32_t check_code[] = {
                /* loop: */
@@ -1400,7 +1426,7 @@ int arm_blank_check_memory(struct target *target,
                0xe2511001,             /* subs r1, r1, #1   */
                0x1afffffb,             /* bne loop          */
                /* end: */
-               0xeafffffe              /* b end             */
+               0xe1200070,             /* bkpt #0 */
        };
 
        /* make sure we have a working area */
@@ -1432,9 +1458,13 @@ int arm_blank_check_memory(struct target *target,
        init_reg_param(&reg_params[2], "r2", 32, PARAM_IN_OUT);
        buf_set_u32(reg_params[2].value, 0, 32, 0xff);
 
+       /* armv4 must exit using a hardware breakpoint */
+       if (armv4_5->is_armv4)
+               exit_var = check_algorithm->address + sizeof(check_code) - 4;
+
        retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
                        check_algorithm->address,
-                       check_algorithm->address + sizeof(check_code) - 4,
+                       exit_var,
                        10000, &armv4_5_info);
        if (retval != ERROR_OK) {
                destroy_reg_param(&reg_params[0]);