target_t -> struct target

[fw/openocd] / src / target / arm_simulator.c

diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c
index bef1405d87e761098e0dc4f06d4ad42cb09f8958..46cd5587311fb116dc43db806d5f5cafefe7fe27 100644 (file)
--- a/src/target/arm_simulator.c
+++ b/src/target/arm_simulator.c
@@ -277,11 +277,11 @@ static int thumb_pass_branch_condition(uint32_t cpsr, uint16_t opcode)
  * if the dry_run_pc argument is provided, no state is changed,
  * but the new pc is stored in the variable pointed at by the argument
  */
-int arm_simulate_step_core(target_t *target,
+int arm_simulate_step_core(struct target *target,
                uint32_t *dry_run_pc, struct arm_sim_interface *sim)
 {
        uint32_t current_pc = sim->get_reg(sim, 15);
-       arm_instruction_t instruction;
+       struct arm_instruction instruction;
        int instruction_size;
        int retval = ERROR_OK;
 
@@ -788,21 +788,21 @@ int arm_simulate_step_core(target_t *target,
 
 static uint32_t armv4_5_get_reg(struct arm_sim_interface *sim, int reg)
 {
-       armv4_5_common_t *armv4_5 = (armv4_5_common_t *)sim->user_data;
+       struct arm *armv4_5 = (struct arm *)sim->user_data;
 
        return buf_get_u32(armv4_5->core_cache->reg_list[reg].value, 0, 32);
 }
 
 static void armv4_5_set_reg(struct arm_sim_interface *sim, int reg, uint32_t value)
 {
-       armv4_5_common_t *armv4_5 = (armv4_5_common_t *)sim->user_data;
+       struct arm *armv4_5 = (struct arm *)sim->user_data;
 
        buf_set_u32(armv4_5->core_cache->reg_list[reg].value, 0, 32, value);
 }
 
 static uint32_t armv4_5_get_reg_mode(struct arm_sim_interface *sim, int reg)
 {
-       armv4_5_common_t *armv4_5 = (armv4_5_common_t *)sim->user_data;
+       struct arm *armv4_5 = (struct arm *)sim->user_data;
 
        return buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache,
                        armv4_5->core_mode, reg).value, 0, 32);
@@ -810,7 +810,7 @@ static uint32_t armv4_5_get_reg_mode(struct arm_sim_interface *sim, int reg)
 
 static void armv4_5_set_reg_mode(struct arm_sim_interface *sim, int reg, uint32_t value)
 {
-       armv4_5_common_t *armv4_5 = (armv4_5_common_t *)sim->user_data;
+       struct arm *armv4_5 = (struct arm *)sim->user_data;
 
        buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache,
                        armv4_5->core_mode, reg).value, 0, 32, value);
@@ -818,21 +818,21 @@ static void armv4_5_set_reg_mode(struct arm_sim_interface *sim, int reg, uint32_
 
 static uint32_t armv4_5_get_cpsr(struct arm_sim_interface *sim, int pos, int bits)
 {
-       armv4_5_common_t *armv4_5 = (armv4_5_common_t *)sim->user_data;
+       struct arm *armv4_5 = (struct arm *)sim->user_data;
 
        return buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, pos, bits);
 }
 
 static enum armv4_5_state armv4_5_get_state(struct arm_sim_interface *sim)
 {
-       armv4_5_common_t *armv4_5 = (armv4_5_common_t *)sim->user_data;
+       struct arm *armv4_5 = (struct arm *)sim->user_data;
 
        return armv4_5->core_state;
 }
 
 static void armv4_5_set_state(struct arm_sim_interface *sim, enum armv4_5_state mode)
 {
-       armv4_5_common_t *armv4_5 = (armv4_5_common_t *)sim->user_data;
+       struct arm *armv4_5 = (struct arm *)sim->user_data;
 
        armv4_5->core_state = mode;
 }
@@ -840,14 +840,14 @@ static void armv4_5_set_state(struct arm_sim_interface *sim, enum armv4_5_state
 
 static enum armv4_5_mode armv4_5_get_mode(struct arm_sim_interface *sim)
 {
-       armv4_5_common_t *armv4_5 = (armv4_5_common_t *)sim->user_data;
+       struct arm *armv4_5 = (struct arm *)sim->user_data;
 
        return armv4_5->core_mode;
 }
 
 
 
-int arm_simulate_step(target_t *target, uint32_t *dry_run_pc)
+int arm_simulate_step(struct target *target, uint32_t *dry_run_pc)
 {
        struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
        struct arm_sim_interface sim;