uint32_t cpsr;
/* restore previous mode */
- if (mode == ARMV4_5_MODE_ANY)
+ if (mode == ARM_MODE_ANY)
cpsr = buf_get_u32(dpm->arm->cpsr->value, 0, 32);
/* else force to the specified mode */
* actually find anything to do...
*/
do {
- enum armv4_5_mode mode = ARMV4_5_MODE_ANY;
+ enum armv4_5_mode mode = ARM_MODE_ANY;
did_write = false;
* we "know" core mode is accurate
* since we haven't changed it yet
*/
- if (arm->core_mode == ARMV4_5_MODE_FIQ
- && ARMV4_5_MODE_ANY
+ if (arm->core_mode == ARM_MODE_FIQ
+ && ARM_MODE_ANY
!= mode)
- tmode = ARMV4_5_MODE_USR;
+ tmode = ARM_MODE_USR;
break;
case 16:
/* SPSR */
}
/* REVISIT error checks */
- if (tmode != ARMV4_5_MODE_ANY)
+ if (tmode != ARM_MODE_ANY)
retval = dpm_modeswitch(dpm, tmode);
}
if (r->mode != mode)
* or it's dirty. Must write PC to ensure the return address is
* defined, and must not write it before CPSR.
*/
- retval = dpm_modeswitch(dpm, ARMV4_5_MODE_ANY);
+ retval = dpm_modeswitch(dpm, ARM_MODE_ANY);
arm->cpsr->dirty = false;
retval = dpm_write_reg(dpm, &cache->reg_list[15], 15);
return retval;
}
-/* Returns ARMV4_5_MODE_ANY or temporary mode to use while reading the
+/* Returns ARM_MODE_ANY or temporary mode to use while reading the
* specified register ... works around flakiness from ARM core calls.
* Caller already filtered out SPSR access; mode is never MODE_SYS
* or MODE_ANY.
enum armv4_5_mode amode = arm->core_mode;
/* don't switch if the mode is already correct */
- if (amode == ARMV4_5_MODE_SYS)
- amode = ARMV4_5_MODE_USR;
+ if (amode == ARM_MODE_SYS)
+ amode = ARM_MODE_USR;
if (mode == amode)
- return ARMV4_5_MODE_ANY;
+ return ARM_MODE_ANY;
switch (num) {
/* don't switch for non-shadowed registers (r0..r7, r15/pc, cpsr) */
break;
/* r8..r12 aren't shadowed for anything except FIQ */
case 8 ... 12:
- if (mode == ARMV4_5_MODE_FIQ)
+ if (mode == ARM_MODE_FIQ)
return mode;
break;
/* r13/sp, and r14/lr are always shadowed */
LOG_WARNING("invalid register #%u", num);
break;
}
- return ARMV4_5_MODE_ANY;
+ return ARM_MODE_ANY;
}
return ERROR_INVALID_ARGUMENTS;
if (regnum == 16) {
- if (mode != ARMV4_5_MODE_ANY)
+ if (mode != ARM_MODE_ANY)
regnum = 17;
} else
mode = dpm_mapmode(dpm->arm, regnum, mode);
if (retval != ERROR_OK)
return retval;
- if (mode != ARMV4_5_MODE_ANY) {
+ if (mode != ARM_MODE_ANY) {
retval = dpm_modeswitch(dpm, mode);
if (retval != ERROR_OK)
goto fail;
retval = dpm_read_reg(dpm, r, regnum);
/* always clean up, regardless of error */
- if (mode != ARMV4_5_MODE_ANY)
- /* (void) */ dpm_modeswitch(dpm, ARMV4_5_MODE_ANY);
+ if (mode != ARM_MODE_ANY)
+ /* (void) */ dpm_modeswitch(dpm, ARM_MODE_ANY);
fail:
/* (void) */ dpm->finish(dpm);
return ERROR_INVALID_ARGUMENTS;
if (regnum == 16) {
- if (mode != ARMV4_5_MODE_ANY)
+ if (mode != ARM_MODE_ANY)
regnum = 17;
} else
mode = dpm_mapmode(dpm->arm, regnum, mode);
if (retval != ERROR_OK)
return retval;
- if (mode != ARMV4_5_MODE_ANY) {
+ if (mode != ARM_MODE_ANY) {
retval = dpm_modeswitch(dpm, mode);
if (retval != ERROR_OK)
goto fail;
retval = dpm_write_reg(dpm, r, regnum);
/* always clean up, regardless of error */
- if (mode != ARMV4_5_MODE_ANY)
- /* (void) */ dpm_modeswitch(dpm, ARMV4_5_MODE_ANY);
+ if (mode != ARM_MODE_ANY)
+ /* (void) */ dpm_modeswitch(dpm, ARM_MODE_ANY);
fail:
/* (void) */ dpm->finish(dpm);
goto done;
do {
- enum armv4_5_mode mode = ARMV4_5_MODE_ANY;
+ enum armv4_5_mode mode = ARM_MODE_ANY;
did_read = false;
/* For R8..R12 when we've entered debug
* state in FIQ mode... patch mode.
*/
- if (mode == ARMV4_5_MODE_ANY)
- mode = ARMV4_5_MODE_USR;
+ if (mode == ARM_MODE_ANY)
+ mode = ARM_MODE_USR;
/* REVISIT error checks */
retval = dpm_modeswitch(dpm, mode);
} while (did_read);
- retval = dpm_modeswitch(dpm, ARMV4_5_MODE_ANY);
+ retval = dpm_modeswitch(dpm, ARM_MODE_ANY);
/* (void) */ dpm->finish(dpm);
done:
return retval;