Fix GCC7 warnings about switch-case fallthroughs

[fw/openocd] / src / target / arm_disassembler.c

diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c
index 65086c2fdd4752d8dd5c2080b5043c0c3a29cc2a..3f1daca4d16309e9a4db50803c209670fea48d47 100644 (file)
--- a/src/target/arm_disassembler.c
+++ b/src/target/arm_disassembler.c
@@ -15,9 +15,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -278,7 +276,7 @@ static int evaluate_ldc_stc_mcrr_mrrc(uint32_t opcode,
        uint8_t cp_num = (opcode & 0xf00) >> 8;
 
        /* MCRR or MRRC */
-       if (((opcode & 0x0ff00000) == 0x0c400000) || ((opcode & 0x0ff00000) == 0x0c400000)) {
+       if (((opcode & 0x0ff00000) == 0x0c400000) || ((opcode & 0x0ff00000) == 0x0c500000)) {
                uint8_t cp_opcode, Rd, Rn, CRm;
                char *mnemonic;
 
@@ -3301,6 +3299,7 @@ static int t2ev_data_immed(uint32_t opcode, uint32_t address,
                case 0x10:
                case 0x12:
                        is_signed = true;
+                       /* fallthrough */
                case 0x18:
                case 0x1a:
                        /* signed/unsigned saturated add */