* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
+
#ifndef ARM_ADI_V5_H
#define ARM_ADI_V5_H
#include "arm_jtag.h"
-/* JTAG instructions/registers for JTAG-DP and SWJ-DP */
-#define JTAG_DP_ABORT 0x8
+/* FIXME remove these JTAG-specific decls when mem_ap_read_buf_u32()
+ * is no longer JTAG-specific
+ */
#define JTAG_DP_DPACC 0xA
#define JTAG_DP_APACC 0xB
-#define JTAG_DP_IDCODE 0xE
-
-/* three-bit ACK values for DPACC and APACC reads */
-#define JTAG_ACK_OK_FAULT 0x2
-#define JTAG_ACK_WAIT 0x1
/* three-bit ACK values for SWD access (sent LSB first) */
#define SWD_ACK_OK 0x4
#define DP_SELECT 0x8 /* JTAG: r/w; SWD: write */
#define DP_RDBUFF 0xC /* read-only */
+#define WCR_TO_TRN(wcr) ((uint32_t)(1 + (3 & ((wcr)) >> 8))) /* 1..4 clocks */
+#define WCR_TO_PRESCALE(wcr) ((uint32_t)(7 & ((wcr)))) /* impl defined */
+
/* Fields of the DP's AP ABORT register */
#define DAPABORT (1 << 0)
#define STKCMPCLR (1 << 1) /* SWD-only */
/* 30:24 - implementation-defined! */
#define CSW_HPROT (1 << 25) /* ? */
#define CSW_MASTER_DEBUG (1 << 29) /* ? */
+#define CSW_SPROT (1 << 30)
#define CSW_DBGSWENABLE (1 << 31)
/**
* a choice made at board design time (by only using the SWD pins), or
* as part of setting up a debug session (if all the dual-role JTAG/SWD
* signals are available).
- *
- * @todo Rename "swjdp_common" as "dap". Use of SWJ-DP is optional!
*/
-struct swjdp_common
-{
+struct adiv5_dap {
const struct dap_ops *ops;
struct arm_jtag *jtag_info;
/* Control config */
uint32_t dp_ctrl_stat;
+ uint32_t apcsw[256];
+ uint32_t apsel;
+
/**
* Cache for DP_SELECT bits identifying the current AP. A DAP may
* connect to multiple APs, such as one MEM-AP for general access,
* another reserved for accessing debug modules, and a JTAG-DP.
* "-1" indicates no cached value.
*/
- uint32_t apsel;
+ uint32_t ap_current;
/**
* Cache for DP_SELECT bits identifying the current four-word AP
* MEM-AP access before we try to read its status (and/or result).
*/
uint32_t memaccess_tck;
+
/* Size of TAR autoincrement block, ARM ADI Specification requires at least 10 bits */
uint32_t tar_autoincr_block;
+ /* true if packed transfers are supported by the MEM-AP */
+ bool packed_transfers;
};
/**
bool is_swd;
/** Reads the DAP's IDCODe register. */
- int (*queue_idcode_read)(struct swjdp_common *dap,
+ int (*queue_idcode_read)(struct adiv5_dap *dap,
uint8_t *ack, uint32_t *data);
/** DP register read. */
- int (*queue_dp_read)(struct swjdp_common *dap, unsigned reg,
+ int (*queue_dp_read)(struct adiv5_dap *dap, unsigned reg,
uint32_t *data);
/** DP register write. */
- int (*queue_dp_write)(struct swjdp_common *dap, unsigned reg,
+ int (*queue_dp_write)(struct adiv5_dap *dap, unsigned reg,
uint32_t data);
/** AP register read. */
- int (*queue_ap_read)(struct swjdp_common *dap, unsigned reg,
+ int (*queue_ap_read)(struct adiv5_dap *dap, unsigned reg,
uint32_t *data);
/** AP register write. */
- int (*queue_ap_write)(struct swjdp_common *dap, unsigned reg,
+ int (*queue_ap_write)(struct adiv5_dap *dap, unsigned reg,
uint32_t data);
+ /** AP read block. */
+ int (*queue_ap_read_block)(struct adiv5_dap *dap, unsigned reg,
+ uint32_t blocksize, uint8_t *buffer);
+
/** AP operation abort. */
- int (*queue_ap_abort)(struct swjdp_common *dap, uint8_t *ack);
+ int (*queue_ap_abort)(struct adiv5_dap *dap, uint8_t *ack);
/** Executes all queued DAP operations. */
- int (*run)(struct swjdp_common *dap);
+ int (*run)(struct adiv5_dap *dap);
+};
+
+/*
+ * Access Port types
+ */
+enum ap_type {
+ AP_TYPE_AHB_AP = 0x01, /* AHB Memory-AP */
+ AP_TYPE_APB_AP = 0x02, /* APB Memory-AP */
+ AP_TYPE_JTAG_AP = 0x10 /* JTAG-AP - JTAG master for controlling other JTAG devices */
};
/**
*
* @return ERROR_OK for success, else a fault code.
*/
-static inline int dap_queue_idcode_read(struct swjdp_common *dap,
+static inline int dap_queue_idcode_read(struct adiv5_dap *dap,
uint8_t *ack, uint32_t *data)
{
+ assert(dap->ops != NULL);
return dap->ops->queue_idcode_read(dap, ack, data);
}
* @param dap The DAP used for reading.
* @param reg The two-bit number of the DP register being read.
* @param data Pointer saying where to store the register's value
- * (in host endianness).
+ * (in host endianness).
*
* @return ERROR_OK for success, else a fault code.
*/
-static inline int dap_queue_dp_read(struct swjdp_common *dap,
+static inline int dap_queue_dp_read(struct adiv5_dap *dap,
unsigned reg, uint32_t *data)
{
+ assert(dap->ops != NULL);
return dap->ops->queue_dp_read(dap, reg, data);
}
*
* @return ERROR_OK for success, else a fault code.
*/
-static inline int dap_queue_dp_write(struct swjdp_common *dap,
+static inline int dap_queue_dp_write(struct adiv5_dap *dap,
unsigned reg, uint32_t data)
{
+ assert(dap->ops != NULL);
return dap->ops->queue_dp_write(dap, reg, data);
}
* @param dap The DAP used for reading.
* @param reg The number of the AP register being read.
* @param data Pointer saying where to store the register's value
- * (in host endianness).
+ * (in host endianness).
*
* @return ERROR_OK for success, else a fault code.
*/
-static inline int dap_queue_ap_read(struct swjdp_common *dap,
+static inline int dap_queue_ap_read(struct adiv5_dap *dap,
unsigned reg, uint32_t *data)
{
+ assert(dap->ops != NULL);
return dap->ops->queue_ap_read(dap, reg, data);
}
*
* @return ERROR_OK for success, else a fault code.
*/
-static inline int dap_queue_ap_write(struct swjdp_common *dap,
+static inline int dap_queue_ap_write(struct adiv5_dap *dap,
unsigned reg, uint32_t data)
{
+ assert(dap->ops != NULL);
return dap->ops->queue_ap_write(dap, reg, data);
}
+/**
+ * Queue an AP block read.
+ *
+ * @param dap The DAP used for reading.
+ * @param reg The number of the AP register being read.
+ * @param blocksize The number of the AP register being read.
+ * @param buffer Pointer saying where to store the data
+ * (in host endianness).
+ *
+ * @return ERROR_OK for success, else a fault code.
+ */
+static inline int dap_queue_ap_read_block(struct adiv5_dap *dap,
+ unsigned reg, unsigned blocksize, uint8_t *buffer)
+{
+ assert(dap->ops != NULL);
+ return dap->ops->queue_ap_read_block(dap, reg, blocksize, buffer);
+}
+
/**
* Queue an AP abort operation. The current AP transaction is aborted,
* including any update of the transaction counter. The AP is left in
*
* @return ERROR_OK for success, else a fault code.
*/
-static inline int dap_queue_ap_abort(struct swjdp_common *dap, uint8_t *ack)
+static inline int dap_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack)
{
+ assert(dap->ops != NULL);
return dap->ops->queue_ap_abort(dap, ack);
}
*
* @return ERROR_OK for success, else a fault code.
*/
-static inline int dap_run(struct swjdp_common *dap)
+static inline int dap_run(struct adiv5_dap *dap)
{
+ assert(dap->ops != NULL);
return dap->ops->run(dap);
}
/** Accessor for currently selected DAP-AP number (0..255) */
-static inline uint8_t dap_ap_get_select(struct swjdp_common *swjdp)
+static inline uint8_t dap_ap_get_select(struct adiv5_dap *swjdp)
{
- return (uint8_t)(swjdp ->apsel >> 24);
+ return (uint8_t)(swjdp->ap_current >> 24);
}
/* AP selection applies to future AP transactions */
-void dap_ap_select(struct swjdp_common *dap,uint8_t apsel);
+void dap_ap_select(struct adiv5_dap *dap, uint8_t ap);
/* Queued AP transactions */
-int dap_setup_accessport(struct swjdp_common *swjdp,
+int dap_setup_accessport(struct adiv5_dap *swjdp,
uint32_t csw, uint32_t tar);
-int dap_ap_write_reg_u32(struct swjdp_common *swjdp,
- uint32_t addr, uint32_t value);
-int dap_ap_read_reg_u32(struct swjdp_common *swjdp,
- uint32_t addr, uint32_t *value);
-
-/* Queued JTAG ops must be completed with jtagdp_transaction_endcheck() */
-int jtagdp_transaction_endcheck(struct swjdp_common *swjdp);
/* Queued MEM-AP memory mapped single word transfers */
-int mem_ap_read_u32(struct swjdp_common *swjdp, uint32_t address, uint32_t *value);
-int mem_ap_write_u32(struct swjdp_common *swjdp, uint32_t address, uint32_t value);
+int mem_ap_read_u32(struct adiv5_dap *swjdp, uint32_t address, uint32_t *value);
+int mem_ap_write_u32(struct adiv5_dap *swjdp, uint32_t address, uint32_t value);
/* Synchronous MEM-AP memory mapped single word transfers */
-int mem_ap_read_atomic_u32(struct swjdp_common *swjdp,
+int mem_ap_read_atomic_u32(struct adiv5_dap *swjdp,
+ uint32_t address, uint32_t *value);
+int mem_ap_write_atomic_u32(struct adiv5_dap *swjdp,
+ uint32_t address, uint32_t value);
+
+/* Queued MEM-AP memory mapped single word transfers with selection of ap */
+int mem_ap_sel_read_u32(struct adiv5_dap *swjdp, uint8_t ap,
uint32_t address, uint32_t *value);
-int mem_ap_write_atomic_u32(struct swjdp_common *swjdp,
+int mem_ap_sel_write_u32(struct adiv5_dap *swjdp, uint8_t ap,
uint32_t address, uint32_t value);
-/* MEM-AP memory mapped bus block transfers */
-int mem_ap_read_buf_u8(struct swjdp_common *swjdp,
- uint8_t *buffer, int count, uint32_t address);
-int mem_ap_read_buf_u16(struct swjdp_common *swjdp,
- uint8_t *buffer, int count, uint32_t address);
-int mem_ap_read_buf_u32(struct swjdp_common *swjdp,
- uint8_t *buffer, int count, uint32_t address);
-
-int mem_ap_write_buf_u8(struct swjdp_common *swjdp,
- uint8_t *buffer, int count, uint32_t address);
-int mem_ap_write_buf_u16(struct swjdp_common *swjdp,
- uint8_t *buffer, int count, uint32_t address);
-int mem_ap_write_buf_u32(struct swjdp_common *swjdp,
- uint8_t *buffer, int count, uint32_t address);
+/* Synchronous MEM-AP memory mapped single word transfers with selection of ap */
+int mem_ap_sel_read_atomic_u32(struct adiv5_dap *swjdp, uint8_t ap,
+ uint32_t address, uint32_t *value);
+int mem_ap_sel_write_atomic_u32(struct adiv5_dap *swjdp, uint8_t ap,
+ uint32_t address, uint32_t value);
+
+/* Synchronous MEM-AP memory mapped bus block transfers */
+int mem_ap_read(struct adiv5_dap *dap, uint8_t *buffer, uint32_t size,
+ uint32_t count, uint32_t address, bool addrinc);
+int mem_ap_write(struct adiv5_dap *dap, const uint8_t *buffer, uint32_t size,
+ uint32_t count, uint32_t address, bool addrinc);
+
+/* Synchronous MEM-AP memory mapped bus block transfers with selection of ap */
+int mem_ap_sel_read_buf(struct adiv5_dap *swjdp, uint8_t ap,
+ uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address);
+int mem_ap_sel_write_buf(struct adiv5_dap *swjdp, uint8_t ap,
+ const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address);
+
+/* Synchronous, non-incrementing buffer functions for accessing fifos, with
+ * selection of ap */
+int mem_ap_sel_read_buf_noincr(struct adiv5_dap *swjdp, uint8_t ap,
+ uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address);
+int mem_ap_sel_write_buf_noincr(struct adiv5_dap *swjdp, uint8_t ap,
+ const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address);
/* Initialisation of the debug system, power domains and registers */
-int ahbap_debugport_init(struct swjdp_common *swjdp);
+int ahbap_debugport_init(struct adiv5_dap *swjdp);
+/* Probe the AP for ROM Table location */
+int dap_get_debugbase(struct adiv5_dap *dap, int ap,
+ uint32_t *dbgbase, uint32_t *apid);
-/* Commands for user dap access */
-int dap_info_command(struct command_context *cmd_ctx,
- struct swjdp_common *swjdp, int apsel);
+/* Probe Access Ports to find a particular type */
+int dap_find_ap(struct adiv5_dap *dap,
+ enum ap_type type_to_find,
+ uint8_t *ap_num_out);
-#define DAP_COMMAND_HANDLER(name) \
- COMMAND_HELPER(name, struct swjdp_common *swjdp)
-DAP_COMMAND_HANDLER(dap_baseaddr_command);
-DAP_COMMAND_HANDLER(dap_memaccess_command);
-DAP_COMMAND_HANDLER(dap_apsel_command);
-DAP_COMMAND_HANDLER(dap_apid_command);
+/* Lookup CoreSight component */
+int dap_lookup_cs_component(struct adiv5_dap *dap, int ap,
+ uint32_t dbgbase, uint8_t type, uint32_t *addr);
struct target;
/* Put debug link into JTAG mode */
int dap_to_jtag(struct target *target);
+extern const struct command_registration dap_command_handlers[];
+
#endif
projects / fw / openocd / blobdiff