- Fixes '<<' whitespace

[fw/openocd] / src / target / arm_adi_v5.c

diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index c7d3bc4ae7c28f7b88a6692e47be4dcefc0ec192..a58c0a7cbf0279ab996e38a73ae3f70790e20833 100644 (file)
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -195,7 +195,7 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
 
        https://lists.berlios.de/pipermail/openocd-development/2008-September/003107.html
        */
-       if ((retval=jtag_execute_queue())!=ERROR_OK)
+       if ((retval=jtag_execute_queue()) != ERROR_OK)
        {
                LOG_ERROR("BUG: Why does this fail the first time????");
        }
@@ -203,7 +203,7 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
 #endif
 
        scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-       if ((retval=jtag_execute_queue())!=ERROR_OK)
+       if ((retval=jtag_execute_queue()) != ERROR_OK)
                return retval;
 
        swjdp->ack = swjdp->ack & 0x7;
@@ -228,7 +228,7 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
                        }
 
                        scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-                       if ((retval=jtag_execute_queue())!=ERROR_OK)
+                       if ((retval=jtag_execute_queue()) != ERROR_OK)
                                return retval;
                        swjdp->ack = swjdp->ack & 0x7;
                }
@@ -261,19 +261,19 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp)
                        /* Clear Sticky Error Bits */
                        scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_WRITE, swjdp->dp_ctrl_stat | SSTICKYORUN | SSTICKYERR, NULL);
                        scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-                       if ((retval=jtag_execute_queue())!=ERROR_OK)
+                       if ((retval=jtag_execute_queue()) != ERROR_OK)
                                return retval;
 
                        LOG_DEBUG("swjdp: status 0x%" PRIx32 "", ctrlstat);
 
                        dap_ap_read_reg_u32(swjdp, AP_REG_CSW, &mem_ap_csw);
                        dap_ap_read_reg_u32(swjdp, AP_REG_TAR, &mem_ap_tar);
-                       if ((retval=jtag_execute_queue())!=ERROR_OK)
+                       if ((retval=jtag_execute_queue()) != ERROR_OK)
                                return retval;
                        LOG_ERROR("Read MEM_AP_CSW 0x%" PRIx32 ", MEM_AP_TAR 0x%" PRIx32 "", mem_ap_csw, mem_ap_tar);
 
                }
-               if ((retval=jtag_execute_queue())!=ERROR_OK)
+               if ((retval=jtag_execute_queue()) != ERROR_OK)
                        return retval;
                return ERROR_JTAG_DEVICE_ERROR;
        }
@@ -300,7 +300,7 @@ int dap_dp_read_reg(swjdp_common_t *swjdp, uint32_t *value, uint8_t reg_addr)
 int dap_ap_select(swjdp_common_t *swjdp,uint8_t apsel)
 {
        uint32_t select;
-       select = (apsel<<24) & 0xFF000000;
+       select = (apsel << 24) & 0xFF000000;
 
        if (select != swjdp->apsel)
        {
@@ -971,7 +971,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp)
 
        dap_dp_write_reg(swjdp, swjdp->dp_ctrl_stat, DP_CTRL_STAT);
        dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
-       if ((retval=jtag_execute_queue())!=ERROR_OK)
+       if ((retval=jtag_execute_queue()) != ERROR_OK)
                return retval;
 
        /* Check that we have debug power domains activated */
@@ -979,7 +979,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp)
        {
                LOG_DEBUG("swjdp: wait CDBGPWRUPACK");
                dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
-               if ((retval=jtag_execute_queue())!=ERROR_OK)
+               if ((retval=jtag_execute_queue()) != ERROR_OK)
                        return retval;
                alive_sleep(10);
        }
@@ -988,7 +988,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp)
        {
                LOG_DEBUG("swjdp: wait CSYSPWRUPACK");
                dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
-               if ((retval=jtag_execute_queue())!=ERROR_OK)
+               if ((retval=jtag_execute_queue()) != ERROR_OK)
                        return retval;
                alive_sleep(10);
        }
@@ -1027,7 +1027,7 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
        dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
        swjdp_transaction_endcheck(swjdp);
        /* Now we read ROM table ID registers, ref. ARM IHI 0029B sec  */
-       mem_ap = ((apid&0x10000)&&((apid&0x0F)!=0));
+       mem_ap = ((apid&0x10000) && ((apid&0x0F) != 0));
        command_print(cmd_ctx, "ap identification register 0x%8.8" PRIx32 "", apid);
        if (apid)
        {
@@ -1053,7 +1053,7 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
                command_print(cmd_ctx, "No AP found at this apsel 0x%x", apsel);
        }
 
-       romtable_present = ((mem_ap)&&(dbgbase != 0xFFFFFFFF));
+       romtable_present = ((mem_ap) && (dbgbase != 0xFFFFFFFF));
        if (romtable_present)
        {
                uint32_t cid0,cid1,cid2,cid3,memtype,romentry;
@@ -1103,12 +1103,12 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i
                                mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFF4, &c_cid1);
                                mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFF8, &c_cid2);
                                mem_ap_read_atomic_u32(swjdp, (component_base&0xFFFFF000)|0xFFC, &c_cid3);
-                               component_start = component_base - 0x1000*(c_pid4>>4);
+                               component_start = component_base - 0x1000*(c_pid4 >> 4);
                                command_print(cmd_ctx, "\t\tComponent base address 0x%" PRIx32 ", pid4 0x%" PRIx32 ", start address 0x%" PRIx32 "",component_base,c_pid4,component_start);
-                               command_print(cmd_ctx, "\t\tComponent cid1 0x%" PRIx32 ", class is %s",c_cid1,class_description[(c_cid1>>4)&0xF]); /* Se ARM DDI 0314 C Table 2.2 */
+                               command_print(cmd_ctx, "\t\tComponent cid1 0x%" PRIx32 ", class is %s",c_cid1,class_description[(c_cid1 >> 4)&0xF]); /* Se ARM DDI 0314 C Table 2.2 */
                                command_print(cmd_ctx, "\t\tCID3 0x%" PRIx32 ", CID2 0x%" PRIx32 ", CID1 0x%" PRIx32 ", CID0, 0x%" PRIx32 "",c_cid3,c_cid2,c_cid1,c_cid0);
                                command_print(cmd_ctx, "\t\tPID3 0x%" PRIx32 ", PID2 0x%" PRIx32 ", PID1 0x%" PRIx32 ", PID0, 0x%" PRIx32 "",c_pid3,c_pid2,c_pid1,c_pid0);
-                               /* For CoreSight components,  (c_cid1>>4)&0xF==9 , we also read 0xFC8 DevId and 0xFCC DevType */
+                               /* For CoreSight components,  (c_cid1 >> 4)&0xF==9 , we also read 0xFC8 DevId and 0xFCC DevType */
                        }
                        else
                        {