*/
dap->ap_current = !0;
dap_ap_select(dap, 0);
+ dap->last_read = NULL;
/* DP initialization */
}
int dap_get_debugbase(struct adiv5_dap *dap, int ap,
- uint32_t *out_dbgbase, uint32_t *out_apid)
+ uint32_t *dbgbase, uint32_t *apid)
{
uint32_t ap_old;
int retval;
- uint32_t dbgbase, apid;
/* AP address is in bits 31:24 of DP_SELECT */
if (ap >= 256)
ap_old = dap->ap_current;
dap_ap_select(dap, ap);
- retval = dap_queue_ap_read(dap, AP_REG_BASE, &dbgbase);
+ retval = dap_queue_ap_read(dap, AP_REG_BASE, dbgbase);
if (retval != ERROR_OK)
return retval;
- retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid);
+ retval = dap_queue_ap_read(dap, AP_REG_IDR, apid);
if (retval != ERROR_OK)
return retval;
retval = dap_run(dap);
if (retval != ERROR_OK)
return retval;
- /* Excavate the device ID code */
- struct jtag_tap *tap = dap->jtag_info->tap;
- while (tap != NULL) {
- if (tap->hasidcode)
- break;
- tap = tap->next_tap;
- }
- if (tap == NULL || !tap->hasidcode)
- return ERROR_OK;
-
dap_ap_select(dap, ap_old);
- /* The asignment happens only here to prevent modification of these
- * values before they are certain. */
- *out_dbgbase = dbgbase;
- *out_apid = apid;
-
return ERROR_OK;
}
int dap_lookup_cs_component(struct adiv5_dap *dap, int ap,
- uint32_t dbgbase, uint8_t type, uint32_t *addr)
+ uint32_t dbgbase, uint8_t type, uint32_t *addr, int32_t *idx)
{
uint32_t ap_old;
uint32_t romentry, entry_offset = 0, component_base, devtype;
- int retval = ERROR_FAIL;
+ int retval;
if (ap >= 256)
return ERROR_COMMAND_SYNTAX_ERROR;
+ *addr = 0;
ap_old = dap->ap_current;
dap_ap_select(dap, ap);
+ (romentry & 0xFFFFF000);
if (romentry & 0x1) {
+ uint32_t c_cid1;
+ retval = mem_ap_read_atomic_u32(dap, component_base | 0xff4, &c_cid1);
+ if (retval != ERROR_OK) {
+ LOG_ERROR("Can't read component with base address 0x%" PRIx32
+ ", the corresponding core might be turned off", component_base);
+ return retval;
+ }
+ if (((c_cid1 >> 4) & 0x0f) == 1) {
+ retval = dap_lookup_cs_component(dap, ap, component_base,
+ type, addr, idx);
+ if (retval == ERROR_OK)
+ break;
+ if (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
+ return retval;
+ }
+
retval = mem_ap_read_atomic_u32(dap,
(component_base & 0xfffff000) | 0xfcc,
&devtype);
if (retval != ERROR_OK)
return retval;
if ((devtype & 0xff) == type) {
- *addr = component_base;
- retval = ERROR_OK;
- break;
+ if (!*idx) {
+ *addr = component_base;
+ break;
+ } else
+ (*idx)--;
}
}
entry_offset += 4;
dap_ap_select(dap, ap_old);
- return retval;
+ if (!*addr)
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+
+ return ERROR_OK;
}
static int dap_rom_display(struct command_context *cmd_ctx,
uint32_t c_pid0, c_pid1, c_pid2, c_pid3, c_pid4;
uint32_t component_base;
unsigned part_num;
- char *type, *full;
+ const char *type, *full;
component_base = (dbgbase & 0xFFFFF000) + (romentry & 0xFFFFF000);
if (((c_cid1 >> 4) & 0x0f) == 9) {
uint32_t devtype;
unsigned minor;
- char *major = "Reserved", *subtype = "Reserved";
+ const char *major = "Reserved", *subtype = "Reserved";
retval = mem_ap_read_atomic_u32(dap,
(component_base & 0xfffff000) | 0xfcc,
struct adiv5_dap *dap, int ap)
{
int retval;
- uint32_t dbgbase = 0, apid = 0; /* Silence gcc by initializing */
+ uint32_t dbgbase, apid;
int romtable_present = 0;
uint8_t mem_ap;
uint32_t ap_old;