#include "config.h"
#endif
+#include "arm.h"
#include "arm_adi_v5.h"
#include <helper/time_support.h>
* @param invalue NULL, or points to a 32-bit (little-endian) integer
* @param ack points to where the three bit JTAG_ACK_* code will be stored
*/
-static int adi_jtag_dp_scan(struct swjdp_common *swjdp,
+static int adi_jtag_dp_scan(struct adiv5_dap *swjdp,
uint8_t instr, uint8_t reg_addr, uint8_t RnW,
uint8_t *outvalue, uint8_t *invalue, uint8_t *ack)
{
/* Scan out a read or write operation using some DP or AP register.
* For APACC access with any sticky error flag set, this is discarded.
*/
- fields[0].tap = jtag_info->tap;
fields[0].num_bits = 3;
buf_set_u32(&out_addr_buf, 0, 3, ((reg_addr >> 1) & 0x6) | (RnW & 0x1));
fields[0].out_value = &out_addr_buf;
* When overrun detect is active, STICKYORUN is set.
*/
- fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
fields[1].out_value = outvalue;
fields[1].in_value = invalue;
- jtag_add_dr_scan(2, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 2, fields, jtag_get_end_state());
/* Add specified number of tck clocks after starting memory bus
* access, giving the hardware time to complete the access.
* conversions are performed (so the types of invalue and outvalue
* must be different).
*/
-static int adi_jtag_dp_scan_u32(struct swjdp_common *swjdp,
+static int adi_jtag_dp_scan_u32(struct adiv5_dap *swjdp,
uint8_t instr, uint8_t reg_addr, uint8_t RnW,
uint32_t outvalue, uint32_t *invalue, uint8_t *ack)
{
/**
* Utility to write AP registers.
*/
-static inline int adi_jtag_ap_write_check(struct swjdp_common *dap,
+static inline int adi_jtag_ap_write_check(struct adiv5_dap *dap,
uint8_t reg_addr, uint8_t *outvalue)
{
return adi_jtag_dp_scan(dap, JTAG_DP_APACC, reg_addr, DPAP_WRITE,
outvalue, NULL, NULL);
}
-static int adi_jtag_scan_inout_check_u32(struct swjdp_common *swjdp,
+static int adi_jtag_scan_inout_check_u32(struct adiv5_dap *swjdp,
uint8_t instr, uint8_t reg_addr, uint8_t RnW,
uint32_t outvalue, uint32_t *invalue)
{
return retval;
}
-static int jtagdp_transaction_endcheck(struct swjdp_common *swjdp)
+static int jtagdp_transaction_endcheck(struct adiv5_dap *swjdp)
{
int retval;
uint32_t ctrlstat;
LOG_DEBUG("jtag-dp: CTRL/STAT 0x%" PRIx32, ctrlstat);
- dap_ap_read_reg_u32(swjdp, AP_REG_CSW, &mem_ap_csw);
- dap_ap_read_reg_u32(swjdp, AP_REG_TAR, &mem_ap_tar);
+ retval = dap_queue_ap_read(swjdp,
+ AP_REG_CSW, &mem_ap_csw);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = dap_queue_ap_read(swjdp,
+ AP_REG_TAR, &mem_ap_tar);
+ if (retval != ERROR_OK)
+ return retval;
+
if ((retval = dap_run(swjdp)) != ERROR_OK)
return retval;
LOG_ERROR("MEM_AP_CSW 0x%" PRIx32 ", MEM_AP_TAR 0x%"
* *
***************************************************************************/
-/* FIXME remove dap_dp_{read,write}_reg() ... these should become the
- * bodies of the JTAG implementations of dap_queue_dp_{read,write}() and
- * callers should switch over to the transport-neutral calls.
- */
-
-static int dap_dp_write_reg(struct swjdp_common *swjdp,
- uint32_t value, uint8_t reg_addr)
-{
- return adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
- reg_addr, DPAP_WRITE, value, NULL);
-}
-
-static int dap_dp_read_reg(struct swjdp_common *swjdp,
- uint32_t *value, uint8_t reg_addr)
-{
- return adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
- reg_addr, DPAP_READ, 0, value);
-}
-
/**
* Select one of the APs connected to the specified DAP. The
* selection is implicitly used with future AP transactions.
* @param apsel Number of the AP to (implicitly) use with further
* transactions. This normally identifies a MEM-AP.
*/
-void dap_ap_select(struct swjdp_common *swjdp,uint8_t apsel)
+void dap_ap_select(struct adiv5_dap *swjdp,uint8_t apsel)
{
uint32_t select = (apsel << 24) & 0xFF000000;
}
}
-/** Select the AP register bank matching bits 7:4 of ap_reg. */
-static int dap_ap_bankselect(struct swjdp_common *swjdp, uint32_t ap_reg)
-{
- uint32_t select = (ap_reg & 0x000000F0);
-
- if (select != swjdp->ap_bank_value)
- {
- swjdp->ap_bank_value = select;
- select |= swjdp->apsel;
- return dap_dp_write_reg(swjdp, select, DP_SELECT);
- } else
- return ERROR_OK;
-}
-
-/* FIXME remove dap_ap_{read,write}_reg() and dap_ap_write_reg_u32()
- * ... these should become the bodies of the JTAG implementations of
- * dap_queue_ap_{read,write}(), then all their current callers should
- * switch over to the transport-neutral calls.
- */
-
-static int dap_ap_write_reg(struct swjdp_common *swjdp,
- uint32_t reg_addr, uint8_t *out_value_buf)
-{
- int retval;
-
- retval = dap_ap_bankselect(swjdp, reg_addr);
- if (retval != ERROR_OK)
- return retval;
-
- return adi_jtag_ap_write_check(swjdp, reg_addr, out_value_buf);
-}
-
-/**
- * Asynchronous (queued) AP register write.
- *
- * @param swjdp The DAP whose currently selected AP will be written.
- * @param reg_addr Eight bit AP register address.
- * @param value Word to be written at reg_addr
- *
- * @return ERROR_OK if the transaction was properly queued, else a fault code.
- */
-int dap_ap_write_reg_u32(struct swjdp_common *swjdp,
- uint32_t reg_addr, uint32_t value)
-{
- uint8_t out_value_buf[4];
-
- buf_set_u32(out_value_buf, 0, 32, value);
- return dap_ap_write_reg(swjdp,
- reg_addr, out_value_buf);
-}
-
-/**
- * Asynchronous (queued) AP register eread.
- *
- * @param swjdp The DAP whose currently selected AP will be read.
- * @param reg_addr Eight bit AP register address.
- * @param value Points to where the 32-bit (little-endian) word will be stored.
- *
- * @return ERROR_OK if the transaction was properly queued, else a fault code.
- */
-int dap_ap_read_reg_u32(struct swjdp_common *swjdp,
- uint32_t reg_addr, uint32_t *value)
-{
- int retval;
-
- retval = dap_ap_bankselect(swjdp, reg_addr);
- if (retval != ERROR_OK)
- return retval;
-
- return adi_jtag_scan_inout_check_u32(swjdp, JTAG_DP_APACC, reg_addr,
- DPAP_READ, 0, value);
-}
-
/**
* Queue transactions setting up transfer parameters for the
* currently selected MEM-AP.
*
* @return ERROR_OK if the transaction was properly queued, else a fault code.
*/
-int dap_setup_accessport(struct swjdp_common *swjdp, uint32_t csw, uint32_t tar)
+int dap_setup_accessport(struct adiv5_dap *swjdp, uint32_t csw, uint32_t tar)
{
int retval;
if (csw != swjdp->ap_csw_value)
{
/* LOG_DEBUG("DAP: Set CSW %x",csw); */
- retval = dap_ap_write_reg_u32(swjdp, AP_REG_CSW, csw);
+ retval = dap_queue_ap_write(swjdp, AP_REG_CSW, csw);
if (retval != ERROR_OK)
return retval;
swjdp->ap_csw_value = csw;
if (tar != swjdp->ap_tar_value)
{
/* LOG_DEBUG("DAP: Set TAR %x",tar); */
- retval = dap_ap_write_reg_u32(swjdp, AP_REG_TAR, tar);
+ retval = dap_queue_ap_write(swjdp, AP_REG_TAR, tar);
if (retval != ERROR_OK)
return retval;
swjdp->ap_tar_value = tar;
*
* @return ERROR_OK for success. Otherwise a fault code.
*/
-int mem_ap_read_u32(struct swjdp_common *swjdp, uint32_t address,
+int mem_ap_read_u32(struct adiv5_dap *swjdp, uint32_t address,
uint32_t *value)
{
int retval;
if (retval != ERROR_OK)
return retval;
- return dap_ap_read_reg_u32(swjdp, AP_REG_BD0 | (address & 0xC), value);
+ return dap_queue_ap_read(swjdp, AP_REG_BD0 | (address & 0xC), value);
}
/**
* @return ERROR_OK for success; *value holds the result.
* Otherwise a fault code.
*/
-int mem_ap_read_atomic_u32(struct swjdp_common *swjdp, uint32_t address,
+int mem_ap_read_atomic_u32(struct adiv5_dap *swjdp, uint32_t address,
uint32_t *value)
{
int retval;
*
* @return ERROR_OK for success. Otherwise a fault code.
*/
-int mem_ap_write_u32(struct swjdp_common *swjdp, uint32_t address,
+int mem_ap_write_u32(struct adiv5_dap *swjdp, uint32_t address,
uint32_t value)
{
int retval;
if (retval != ERROR_OK)
return retval;
- return dap_ap_write_reg_u32(swjdp, AP_REG_BD0 | (address & 0xC),
+ return dap_queue_ap_write(swjdp, AP_REG_BD0 | (address & 0xC),
value);
}
*
* @return ERROR_OK for success; the data was written. Otherwise a fault code.
*/
-int mem_ap_write_atomic_u32(struct swjdp_common *swjdp, uint32_t address,
+int mem_ap_write_atomic_u32(struct adiv5_dap *swjdp, uint32_t address,
uint32_t value)
{
int retval = mem_ap_write_u32(swjdp, address, value);
/*****************************************************************************
* *
-* mem_ap_write_buf(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address) *
+* mem_ap_write_buf(struct adiv5_dap *swjdp, uint8_t *buffer, int count, uint32_t address) *
* *
* Write a buffer in target order (little endian) *
* *
*****************************************************************************/
-int mem_ap_write_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
+int mem_ap_write_buf_u32(struct adiv5_dap *swjdp, uint8_t *buffer, int count, uint32_t address)
{
int wcount, blocksize, writecount, errorcount = 0, retval = ERROR_OK;
uint32_t adr = address;
for (writecount = 0; writecount < blocksize; writecount++)
{
- dap_ap_write_reg(swjdp, AP_REG_DRW, buffer + 4 * writecount);
+ retval = dap_queue_ap_write(swjdp, AP_REG_DRW,
+ *(uint32_t *) (buffer + 4 * writecount));
+ if (retval != ERROR_OK)
+ break;
}
if (dap_run(swjdp) == ERROR_OK)
return retval;
}
-static int mem_ap_write_buf_packed_u16(struct swjdp_common *swjdp,
+static int mem_ap_write_buf_packed_u16(struct adiv5_dap *swjdp,
uint8_t *buffer, int count, uint32_t address)
{
int retval = ERROR_OK;
}
memcpy(&outvalue, buffer, sizeof(uint32_t));
- dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue);
+ retval = dap_queue_ap_write(swjdp,
+ AP_REG_DRW, outvalue);
+ if (retval != ERROR_OK)
+ break;
+
if (dap_run(swjdp) != ERROR_OK)
{
LOG_WARNING("Block write error address "
return retval;
}
-int mem_ap_write_buf_u16(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
+int mem_ap_write_buf_u16(struct adiv5_dap *swjdp, uint8_t *buffer, int count, uint32_t address)
{
int retval = ERROR_OK;
uint16_t svalue;
memcpy(&svalue, buffer, sizeof(uint16_t));
uint32_t outvalue = (uint32_t)svalue << 8 * (address & 0x3);
- dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue);
+ retval = dap_queue_ap_write(swjdp, AP_REG_DRW, outvalue);
+ if (retval != ERROR_OK)
+ break;
+
retval = dap_run(swjdp);
if (retval != ERROR_OK)
break;
return retval;
}
-static int mem_ap_write_buf_packed_u8(struct swjdp_common *swjdp,
+static int mem_ap_write_buf_packed_u8(struct adiv5_dap *swjdp,
uint8_t *buffer, int count, uint32_t address)
{
int retval = ERROR_OK;
}
memcpy(&outvalue, buffer, sizeof(uint32_t));
- dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue);
+ retval = dap_queue_ap_write(swjdp,
+ AP_REG_DRW, outvalue);
+ if (retval != ERROR_OK)
+ break;
+
if (dap_run(swjdp) != ERROR_OK)
{
LOG_WARNING("Block write error address "
return retval;
}
-int mem_ap_write_buf_u8(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
+int mem_ap_write_buf_u8(struct adiv5_dap *swjdp, uint8_t *buffer, int count, uint32_t address)
{
int retval = ERROR_OK;
{
dap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_SINGLE, address);
uint32_t outvalue = (uint32_t)*buffer << 8 * (address & 0x3);
- dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue);
+ retval = dap_queue_ap_write(swjdp, AP_REG_DRW, outvalue);
+ if (retval != ERROR_OK)
+ break;
+
retval = dap_run(swjdp);
if (retval != ERROR_OK)
break;
* @param address Memory address from which to read words; all the
* words must be readable by the currently selected MEM-AP.
*/
-int mem_ap_read_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer,
+int mem_ap_read_buf_u32(struct adiv5_dap *swjdp, uint8_t *buffer,
int count, uint32_t address)
{
int wcount, blocksize, readcount, errorcount = 0, retval = ERROR_OK;
dap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_SINGLE,
address);
+ /* FIXME remove these three calls to adi_jtag_dp_scan(),
+ * so this routine becomes transport-neutral. Be careful
+ * not to cause performance problems with JTAG; would it
+ * suffice to loop over dap_queue_ap_read(), or would that
+ * be slower when JTAG is the chosen transport?
+ */
+
/* Scan out first read */
adi_jtag_dp_scan(swjdp, JTAG_DP_APACC, AP_REG_DRW,
DPAP_READ, 0, NULL, NULL);
return retval;
}
-static int mem_ap_read_buf_packed_u16(struct swjdp_common *swjdp,
+static int mem_ap_read_buf_packed_u16(struct adiv5_dap *swjdp,
uint8_t *buffer, int count, uint32_t address)
{
uint32_t invalue;
do
{
- dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue);
+ retval = dap_queue_ap_read(swjdp, AP_REG_DRW, &invalue);
if (dap_run(swjdp) != ERROR_OK)
{
LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
* @param address Memory address from which to read words; all the
* words must be readable by the currently selected MEM-AP.
*/
-int mem_ap_read_buf_u16(struct swjdp_common *swjdp, uint8_t *buffer,
+int mem_ap_read_buf_u16(struct adiv5_dap *swjdp, uint8_t *buffer,
int count, uint32_t address)
{
uint32_t invalue, i;
while (count > 0)
{
dap_setup_accessport(swjdp, CSW_16BIT | CSW_ADDRINC_SINGLE, address);
- dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue);
+ retval = dap_queue_ap_read(swjdp, AP_REG_DRW, &invalue);
+ if (retval != ERROR_OK)
+ break;
+
retval = dap_run(swjdp);
if (retval != ERROR_OK)
break;
* The solution is to arrange for a large out/in scan in this loop and
* and convert data afterwards.
*/
-static int mem_ap_read_buf_packed_u8(struct swjdp_common *swjdp,
+static int mem_ap_read_buf_packed_u8(struct adiv5_dap *swjdp,
uint8_t *buffer, int count, uint32_t address)
{
uint32_t invalue;
do
{
- dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue);
+ retval = dap_queue_ap_read(swjdp, AP_REG_DRW, &invalue);
if (dap_run(swjdp) != ERROR_OK)
{
LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
* @param address Memory address from which to read data; all the
* data must be readable by the currently selected MEM-AP.
*/
-int mem_ap_read_buf_u8(struct swjdp_common *swjdp, uint8_t *buffer,
+int mem_ap_read_buf_u8(struct adiv5_dap *swjdp, uint8_t *buffer,
int count, uint32_t address)
{
uint32_t invalue;
while (count > 0)
{
dap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_SINGLE, address);
- dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue);
+ retval = dap_queue_ap_read(swjdp, AP_REG_DRW, &invalue);
retval = dap_run(swjdp);
if (retval != ERROR_OK)
break;
/*--------------------------------------------------------------------------*/
-static int jtag_idcode_q_read(struct swjdp_common *dap,
+static int jtag_idcode_q_read(struct adiv5_dap *dap,
uint8_t *ack, uint32_t *data)
{
struct arm_jtag *jtag_info = dap->jtag_info;
if (retval != ERROR_OK)
return retval;
- fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].in_value = (void *) data;
- jtag_add_dr_scan(1, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 1, fields, jtag_get_end_state());
retval = jtag_get_error();
if (retval != ERROR_OK)
return retval;
return retval;
}
-static int jtag_dp_q_read(struct swjdp_common *dap, unsigned reg,
+static int jtag_dp_q_read(struct adiv5_dap *dap, unsigned reg,
uint32_t *data)
{
- return dap_dp_read_reg(dap, data, reg);
+ return adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
+ reg, DPAP_READ, 0, data);
}
-static int jtag_dp_q_write(struct swjdp_common *dap, unsigned reg,
+static int jtag_dp_q_write(struct adiv5_dap *dap, unsigned reg,
uint32_t data)
{
- return dap_dp_write_reg(dap, data, reg);
+ return adi_jtag_scan_inout_check_u32(dap, JTAG_DP_DPACC,
+ reg, DPAP_WRITE, data, NULL);
}
-static int jtag_ap_q_bankselect(struct swjdp_common *dap, unsigned reg)
+/** Select the AP register bank matching bits 7:4 of reg. */
+static int jtag_ap_q_bankselect(struct adiv5_dap *dap, unsigned reg)
{
uint32_t select = reg & 0x000000F0;
return jtag_dp_q_write(dap, DP_SELECT, select);
}
-static int jtag_ap_q_read(struct swjdp_common *dap, unsigned reg,
+static int jtag_ap_q_read(struct adiv5_dap *dap, unsigned reg,
uint32_t *data)
{
int retval = jtag_ap_q_bankselect(dap, reg);
if (retval != ERROR_OK)
return retval;
- return dap_ap_read_reg_u32(dap, reg, data);
+
+ return adi_jtag_scan_inout_check_u32(dap, JTAG_DP_APACC, reg,
+ DPAP_READ, 0, data);
}
-static int jtag_ap_q_write(struct swjdp_common *dap, unsigned reg,
+static int jtag_ap_q_write(struct adiv5_dap *dap, unsigned reg,
uint32_t data)
{
- int retval = jtag_ap_q_bankselect(dap, reg);
+ uint8_t out_value_buf[4];
+ int retval = jtag_ap_q_bankselect(dap, reg);
if (retval != ERROR_OK)
return retval;
- return dap_ap_write_reg_u32(dap, reg, data);
+
+ buf_set_u32(out_value_buf, 0, 32, data);
+
+ return adi_jtag_ap_write_check(dap, reg, out_value_buf);
}
-static int jtag_ap_q_abort(struct swjdp_common *dap, uint8_t *ack)
+static int jtag_ap_q_abort(struct adiv5_dap *dap, uint8_t *ack)
{
/* for JTAG, this is the only valid ABORT register operation */
return adi_jtag_dp_scan_u32(dap, JTAG_DP_ABORT,
0, DPAP_WRITE, 1, NULL, ack);
}
-static int jtag_dp_run(struct swjdp_common *dap)
+static int jtag_dp_run(struct adiv5_dap *dap)
{
return jtagdp_transaction_endcheck(dap);
}
* in layering. (JTAG is useful without any debug target; but not SWD.)
* And this may not even use an AHB-AP ... e.g. DAP-Lite uses an APB-AP.
*/
-int ahbap_debugport_init(struct swjdp_common *swjdp)
+int ahbap_debugport_init(struct adiv5_dap *swjdp)
{
uint32_t idreg, romaddr, dummy;
uint32_t ctrlstat;
dap_ap_select(swjdp, 0);
/* DP initialization */
- dap_dp_read_reg(swjdp, &dummy, DP_CTRL_STAT);
- dap_dp_write_reg(swjdp, SSTICKYERR, DP_CTRL_STAT);
- dap_dp_read_reg(swjdp, &dummy, DP_CTRL_STAT);
+
+ retval = dap_queue_dp_read(swjdp, DP_CTRL_STAT, &dummy);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = dap_queue_dp_write(swjdp, DP_CTRL_STAT, SSTICKYERR);
+ if (retval != ERROR_OK)
+ return retval;
+
+ retval = dap_queue_dp_read(swjdp, DP_CTRL_STAT, &dummy);
+ if (retval != ERROR_OK)
+ return retval;
swjdp->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ;
+ retval = dap_queue_dp_write(swjdp, DP_CTRL_STAT, swjdp->dp_ctrl_stat);
+ if (retval != ERROR_OK)
+ return retval;
- dap_dp_write_reg(swjdp, swjdp->dp_ctrl_stat, DP_CTRL_STAT);
- dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
+ retval = dap_queue_dp_read(swjdp, DP_CTRL_STAT, &ctrlstat);
+ if (retval != ERROR_OK)
+ return retval;
if ((retval = dap_run(swjdp)) != ERROR_OK)
return retval;
while (!(ctrlstat & CDBGPWRUPACK) && (cnt++ < 10))
{
LOG_DEBUG("DAP: wait CDBGPWRUPACK");
- dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
+ retval = dap_queue_dp_read(swjdp, DP_CTRL_STAT, &ctrlstat);
+ if (retval != ERROR_OK)
+ return retval;
if ((retval = dap_run(swjdp)) != ERROR_OK)
return retval;
alive_sleep(10);
while (!(ctrlstat & CSYSPWRUPACK) && (cnt++ < 10))
{
LOG_DEBUG("DAP: wait CSYSPWRUPACK");
- dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
+ retval = dap_queue_dp_read(swjdp, DP_CTRL_STAT, &ctrlstat);
+ if (retval != ERROR_OK)
+ return retval;
if ((retval = dap_run(swjdp)) != ERROR_OK)
return retval;
alive_sleep(10);
}
- dap_dp_read_reg(swjdp, &dummy, DP_CTRL_STAT);
+ retval = dap_queue_dp_read(swjdp, DP_CTRL_STAT, &dummy);
+ if (retval != ERROR_OK)
+ return retval;
/* With debug power on we can activate OVERRUN checking */
swjdp->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ | CORUNDETECT;
- dap_dp_write_reg(swjdp, swjdp->dp_ctrl_stat, DP_CTRL_STAT);
- dap_dp_read_reg(swjdp, &dummy, DP_CTRL_STAT);
+ retval = dap_queue_dp_write(swjdp, DP_CTRL_STAT, swjdp->dp_ctrl_stat);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = dap_queue_dp_read(swjdp, DP_CTRL_STAT, &dummy);
+ if (retval != ERROR_OK)
+ return retval;
/*
* REVISIT this isn't actually *initializing* anything in an AP,
* Should it? If the ROM address is valid, is this the right
* place to scan the table and do any topology detection?
*/
- dap_ap_read_reg_u32(swjdp, AP_REG_IDR, &idreg);
- dap_ap_read_reg_u32(swjdp, AP_REG_BASE, &romaddr);
+ retval = dap_queue_ap_read(swjdp, AP_REG_IDR, &idreg);
+ retval = dap_queue_ap_read(swjdp, AP_REG_BASE, &romaddr);
LOG_DEBUG("MEM-AP #%d ID Register 0x%" PRIx32
", Debug ROM Address 0x%" PRIx32,
&& ((cid1 & 0x0f) == 0) && cid0 == 0x0d;
}
-int dap_info_command(struct command_context *cmd_ctx,
- struct swjdp_common *swjdp, int apsel)
+static int dap_info_command(struct command_context *cmd_ctx,
+ struct adiv5_dap *swjdp, int apsel)
{
int retval;
uint32_t dbgbase, apid;
apselold = swjdp->apsel;
dap_ap_select(swjdp, apsel);
- dap_ap_read_reg_u32(swjdp, AP_REG_BASE, &dbgbase);
- dap_ap_read_reg_u32(swjdp, AP_REG_IDR, &apid);
+ retval = dap_queue_ap_read(swjdp, AP_REG_BASE, &dbgbase);
+ retval = dap_queue_ap_read(swjdp, AP_REG_IDR, &apid);
retval = dap_run(swjdp);
if (retval != ERROR_OK)
return retval;
return ERROR_OK;
}
-DAP_COMMAND_HANDLER(dap_baseaddr_command)
+COMMAND_HANDLER(handle_dap_info_command)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ struct arm *arm = target_to_arm(target);
+ struct adiv5_dap *dap = arm->dap;
+ uint32_t apsel;
+
+ switch (CMD_ARGC) {
+ case 0:
+ apsel = dap->apsel;
+ break;
+ case 1:
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
+ break;
+ default:
+ return ERROR_COMMAND_SYNTAX_ERROR;
+ }
+
+ return dap_info_command(CMD_CTX, dap, apsel);
+}
+
+COMMAND_HANDLER(dap_baseaddr_command)
{
+ struct target *target = get_current_target(CMD_CTX);
+ struct arm *arm = target_to_arm(target);
+ struct adiv5_dap *dap = arm->dap;
+
uint32_t apsel, apselsave, baseaddr;
int retval;
- apselsave = swjdp->apsel;
+ apselsave = dap->apsel;
switch (CMD_ARGC) {
case 0:
- apsel = swjdp->apsel;
+ apsel = dap->apsel;
break;
case 1:
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
}
if (apselsave != apsel)
- dap_ap_select(swjdp, apsel);
+ dap_ap_select(dap, apsel);
/* NOTE: assumes we're talking to a MEM-AP, which
* has a base address. There are other kinds of AP,
* though they're not common for now. This should
* use the ID register to verify it's a MEM-AP.
*/
- dap_ap_read_reg_u32(swjdp, AP_REG_BASE, &baseaddr);
- retval = dap_run(swjdp);
+ retval = dap_queue_ap_read(dap, AP_REG_BASE, &baseaddr);
+ retval = dap_run(dap);
if (retval != ERROR_OK)
return retval;
command_print(CMD_CTX, "0x%8.8" PRIx32, baseaddr);
if (apselsave != apsel)
- dap_ap_select(swjdp, apselsave);
+ dap_ap_select(dap, apselsave);
return retval;
}
-DAP_COMMAND_HANDLER(dap_memaccess_command)
+COMMAND_HANDLER(dap_memaccess_command)
{
+ struct target *target = get_current_target(CMD_CTX);
+ struct arm *arm = target_to_arm(target);
+ struct adiv5_dap *dap = arm->dap;
+
uint32_t memaccess_tck;
switch (CMD_ARGC) {
case 0:
- memaccess_tck = swjdp->memaccess_tck;
+ memaccess_tck = dap->memaccess_tck;
break;
case 1:
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], memaccess_tck);
default:
return ERROR_COMMAND_SYNTAX_ERROR;
}
- swjdp->memaccess_tck = memaccess_tck;
+ dap->memaccess_tck = memaccess_tck;
command_print(CMD_CTX, "memory bus access delay set to %" PRIi32 " tck",
- swjdp->memaccess_tck);
+ dap->memaccess_tck);
return ERROR_OK;
}
-DAP_COMMAND_HANDLER(dap_apsel_command)
+COMMAND_HANDLER(dap_apsel_command)
{
+ struct target *target = get_current_target(CMD_CTX);
+ struct arm *arm = target_to_arm(target);
+ struct adiv5_dap *dap = arm->dap;
+
uint32_t apsel, apid;
int retval;
return ERROR_COMMAND_SYNTAX_ERROR;
}
- dap_ap_select(swjdp, apsel);
- dap_ap_read_reg_u32(swjdp, AP_REG_IDR, &apid);
- retval = dap_run(swjdp);
+ dap_ap_select(dap, apsel);
+ retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid);
+ retval = dap_run(dap);
if (retval != ERROR_OK)
return retval;
return retval;
}
-DAP_COMMAND_HANDLER(dap_apid_command)
+COMMAND_HANDLER(dap_apid_command)
{
+ struct target *target = get_current_target(CMD_CTX);
+ struct arm *arm = target_to_arm(target);
+ struct adiv5_dap *dap = arm->dap;
+
uint32_t apsel, apselsave, apid;
int retval;
- apselsave = swjdp->apsel;
+ apselsave = dap->apsel;
switch (CMD_ARGC) {
case 0:
- apsel = swjdp->apsel;
+ apsel = dap->apsel;
break;
case 1:
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
}
if (apselsave != apsel)
- dap_ap_select(swjdp, apsel);
+ dap_ap_select(dap, apsel);
- dap_ap_read_reg_u32(swjdp, AP_REG_IDR, &apid);
- retval = dap_run(swjdp);
+ retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid);
+ retval = dap_run(dap);
if (retval != ERROR_OK)
return retval;
command_print(CMD_CTX, "0x%8.8" PRIx32, apid);
if (apselsave != apsel)
- dap_ap_select(swjdp, apselsave);
+ dap_ap_select(dap, apselsave);
return retval;
}
+static const struct command_registration dap_commands[] = {
+ {
+ .name = "info",
+ .handler = handle_dap_info_command,
+ .mode = COMMAND_EXEC,
+ .help = "display ROM table for MEM-AP "
+ "(default currently selected AP)",
+ .usage = "[ap_num]",
+ },
+ {
+ .name = "apsel",
+ .handler = dap_apsel_command,
+ .mode = COMMAND_EXEC,
+ .help = "Set the currently selected AP (default 0) "
+ "and display the result",
+ .usage = "[ap_num]",
+ },
+ {
+ .name = "apid",
+ .handler = dap_apid_command,
+ .mode = COMMAND_EXEC,
+ .help = "return ID register from AP "
+ "(default currently selected AP)",
+ .usage = "[ap_num]",
+ },
+ {
+ .name = "baseaddr",
+ .handler = dap_baseaddr_command,
+ .mode = COMMAND_EXEC,
+ .help = "return debug base address from MEM-AP "
+ "(default currently selected AP)",
+ .usage = "[ap_num]",
+ },
+ {
+ .name = "memaccess",
+ .handler = dap_memaccess_command,
+ .mode = COMMAND_EXEC,
+ .help = "set/get number of extra tck for MEM-AP memory "
+ "bus access [0-255]",
+ .usage = "[cycles]",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+const struct command_registration dap_command_handlers[] = {
+ {
+ .name = "dap",
+ .mode = COMMAND_EXEC,
+ .help = "DAP command group",
+ .chain = dap_commands,
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+
/*
* This represents the bits which must be sent out on TMS/SWDIO to
* switch a DAP implemented using an SWJ-DP module into SWD mode.
projects / fw / openocd / blobdiff