kinetis : Add timeouts to flash status checking in dap_syssec_kinetis_mdmap().
[fw/openocd] / src / target / arm_adi_v5.c
index 2e3dafb93d008b1554e5cac1a068644f431383b2..4e36d9d20d9988182343eb81cba6d732c67bdf6b 100644 (file)
@@ -5,11 +5,14 @@
  *   Copyright (C) 2008 by Spencer Oliver                                  *
  *   spen@spen-soft.co.uk                                                  *
  *                                                                         *
- *   Copyright (C) 2009 by Oyvind Harboe                                   *
+ *   Copyright (C) 2009-2010 by Oyvind Harboe                              *
  *   oyvind.harboe@zylin.com                                               *
  *                                                                         *
  *   Copyright (C) 2009-2010 by David Brownell                             *
  *                                                                         *
+ *   Copyright (C) 2013 by Andreas Fritiofson                              *
+ *   andreas.fritiofson@gmail.com                                          *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -23,7 +26,7 @@
  *   You should have received a copy of the GNU General Public License     *
  *   along with this program; if not, write to the                         *
  *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  ***************************************************************************/
 
 /**
  * is used to access memory mapped resources and is called a MEM-AP.  Also a
  * JTAG-AP is also defined, bridging to JTAG resources; those are uncommon.
  *
- * @todo Remove modality (queued/nonqueued, via DAP trans_mode) from all
- * procedure interfaces.  Modal programming interfaces are very error prone.
- * Procedures should be either queued, or synchronous.  Otherwise input
- * and output constraints are context-sensitive, and it's hard to know
- * what a block of code will do just by reading it.
+ * This programming interface allows DAP pipelined operations through a
+ * transaction queue.  This primarily affects AP operations (such as using
+ * a MEM-AP to access memory or registers).  If the current transaction has
+ * not finished by the time the next one must begin, and the ORUNDETECT bit
+ * is set in the DP_CTRL_STAT register, the SSTICKYORUN status is set and
+ * further AP operations will fail.  There are two basic methods to avoid
+ * such overrun errors.  One involves polling for status instead of using
+ * transaction piplining.  The other involves adding delays to ensure the
+ * AP has enough time to complete one operation before starting the next
+ * one.  (For JTAG these delays are controlled by memaccess_tck.)
  */
 
 /*
 #include "config.h"
 #endif
 
+#include "jtag/interface.h"
+#include "arm.h"
 #include "arm_adi_v5.h"
 #include <helper/time_support.h>
 
-/*
- * Transaction Mode:
- * swjdp->trans_mode = TRANS_MODE_COMPOSITE;
- * Uses Overrun checking mode and does not do actual JTAG send/receive or transaction
- * result checking until swjdp_end_transaction()
- * This must be done before using or deallocating any return variables.
- * swjdp->trans_mode == TRANS_MODE_ATOMIC
- * All reads and writes to the AHB bus are checked for valid completion, and return values
- * are immediatley available.
-*/
-
-
 /* ARM ADI Specification requires at least 10 bits used for TAR autoincrement  */
 
 /*
 */
 static uint32_t max_tar_block_size(uint32_t tar_autoincr_block, uint32_t address)
 {
-       return (tar_autoincr_block - ((tar_autoincr_block - 1) & address)) >> 2;
-}
-
-/***************************************************************************
- *                                                                         *
- * DPACC and APACC scanchain access through JTAG-DP                        *
- *                                                                         *
-***************************************************************************/
-
-/**
- * Scan DPACC or APACC using target ordered uint8_t buffers.  No endianness
- * conversions are performed.  See section 4.4.3 of the ADIv5 spec, which
- * discusses operations which access these registers.
- *
- * Note that only one scan is performed.  If RnW is set, a separate scan
- * will be needed to collect the data which was read; the "invalue" collects
- * the posted result of a preceding operation, not the current one.
- *
- * @param swjdp the DAP
- * @param instr JTAG_DP_APACC (AP access) or JTAG_DP_DPACC (DP access)
- * @param reg_addr two significant bits; A[3:2]; for APACC access, the
- *     SELECT register has more addressing bits.
- * @param RnW false iff outvalue will be written to the DP or AP
- * @param outvalue points to a 32-bit (little-endian) integer
- * @param invalue NULL, or points to a 32-bit (little-endian) integer
- * @param ack points to where the three bit JTAG_ACK_* code will be stored
- */
-static int adi_jtag_dp_scan(struct swjdp_common *swjdp,
-               uint8_t instr, uint8_t reg_addr, uint8_t RnW,
-               uint8_t *outvalue, uint8_t *invalue, uint8_t *ack)
-{
-       struct arm_jtag *jtag_info = swjdp->jtag_info;
-       struct scan_field fields[2];
-       uint8_t out_addr_buf;
-
-       jtag_set_end_state(TAP_IDLE);
-       arm_jtag_set_instr(jtag_info, instr, NULL);
-
-       /* Add specified number of tck clocks before accessing memory bus */
-
-       /* REVISIT these TCK cycles should be *AFTER*  updating APACC, since
-        * they provide more time for the (MEM) AP to complete the read ...
-        * See "Minimum Response Time" for JTAG-DP, in the ADIv5 spec.
-        */
-       if ((instr == JTAG_DP_APACC)
-                       && ((reg_addr == AP_REG_DRW)
-                               || ((reg_addr & 0xF0) == AP_REG_BD0))
-                       && (swjdp->memaccess_tck != 0))
-               jtag_add_runtest(swjdp->memaccess_tck, jtag_set_end_state(TAP_IDLE));
-
-       /* Scan out a read or write operation using some DP or AP register.
-        * For APACC access with any sticky error flag set, this is discarded.
-        */
-       fields[0].tap = jtag_info->tap;
-       fields[0].num_bits = 3;
-       buf_set_u32(&out_addr_buf, 0, 3, ((reg_addr >> 1) & 0x6) | (RnW & 0x1));
-       fields[0].out_value = &out_addr_buf;
-       fields[0].in_value = ack;
-
-       /* NOTE: if we receive JTAG_ACK_WAIT, the previous operation did not
-        * complete; data we write is discarded, data we read is unpredictable.
-        * When overrun detect is active, STICKYORUN is set.
-        */
-
-       fields[1].tap = jtag_info->tap;
-       fields[1].num_bits = 32;
-       fields[1].out_value = outvalue;
-       fields[1].in_value = invalue;
-
-       jtag_add_dr_scan(2, fields, jtag_get_end_state());
-
-       return ERROR_OK;
-}
-
-/* Scan out and in from host ordered uint32_t variables */
-static int adi_jtag_dp_scan_u32(struct swjdp_common *swjdp,
-               uint8_t instr, uint8_t reg_addr, uint8_t RnW,
-               uint32_t outvalue, uint32_t *invalue, uint8_t *ack)
-{
-       struct arm_jtag *jtag_info = swjdp->jtag_info;
-       struct scan_field fields[2];
-       uint8_t out_value_buf[4];
-       uint8_t out_addr_buf;
-
-       jtag_set_end_state(TAP_IDLE);
-       arm_jtag_set_instr(jtag_info, instr, NULL);
-
-       /* Add specified number of tck clocks before accessing memory bus */
-
-       /* REVISIT these TCK cycles should be *AFTER*  updating APACC, since
-        * they provide more time for the (MEM) AP to complete the read ...
-        */
-       if ((instr == JTAG_DP_APACC)
-                       && ((reg_addr == AP_REG_DRW)
-                               || ((reg_addr & 0xF0) == AP_REG_BD0))
-                       && (swjdp->memaccess_tck != 0))
-               jtag_add_runtest(swjdp->memaccess_tck, jtag_set_end_state(TAP_IDLE));
-
-       fields[0].tap = jtag_info->tap;
-       fields[0].num_bits = 3;
-       buf_set_u32(&out_addr_buf, 0, 3, ((reg_addr >> 1) & 0x6) | (RnW & 0x1));
-       fields[0].out_value = &out_addr_buf;
-       fields[0].in_value = ack;
-
-       fields[1].tap = jtag_info->tap;
-       fields[1].num_bits = 32;
-       buf_set_u32(out_value_buf, 0, 32, outvalue);
-       fields[1].out_value = out_value_buf;
-       fields[1].in_value = NULL;
-
-       if (invalue)
-       {
-               fields[1].in_value = (uint8_t *)invalue;
-               jtag_add_dr_scan(2, fields, jtag_get_end_state());
-
-               jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t) invalue);
-       } else
-       {
-
-               jtag_add_dr_scan(2, fields, jtag_get_end_state());
-       }
-
-       return ERROR_OK;
-}
-
-/* scan_inout_check adds one extra inscan for DPAP_READ commands to read variables */
-static int scan_inout_check(struct swjdp_common *swjdp,
-               uint8_t instr, uint8_t reg_addr, uint8_t RnW,
-               uint8_t *outvalue, uint8_t *invalue)
-{
-       adi_jtag_dp_scan(swjdp, instr, reg_addr, RnW, outvalue, NULL, NULL);
-
-       if ((RnW == DPAP_READ) && (invalue != NULL))
-               adi_jtag_dp_scan(swjdp, JTAG_DP_DPACC,
-                               DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack);
-
-       /* In TRANS_MODE_ATOMIC all JTAG_DP_APACC transactions wait for
-        * ack = OK/FAULT and the check CTRL_STAT
-        */
-       if ((instr == JTAG_DP_APACC)
-                       && (swjdp->trans_mode == TRANS_MODE_ATOMIC))
-               return jtagdp_transaction_endcheck(swjdp);
-
-       return ERROR_OK;
-}
-
-static int scan_inout_check_u32(struct swjdp_common *swjdp,
-               uint8_t instr, uint8_t reg_addr, uint8_t RnW,
-               uint32_t outvalue, uint32_t *invalue)
-{
-       /* Issue the read or write */
-       adi_jtag_dp_scan_u32(swjdp, instr, reg_addr, RnW, outvalue, NULL, NULL);
-
-       /* For reads,  collect posted value; RDBUFF has no other effect.
-        * Assumes read gets acked with OK/FAULT, and CTRL_STAT says "OK".
-        */
-       if ((RnW == DPAP_READ) && (invalue != NULL))
-               adi_jtag_dp_scan_u32(swjdp, JTAG_DP_DPACC,
-                               DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack);
-
-       /* In TRANS_MODE_ATOMIC all JTAG_DP_APACC transactions wait for
-        * ack = OK/FAULT and then check CTRL_STAT
-        */
-       if ((instr == JTAG_DP_APACC)
-                       && (swjdp->trans_mode == TRANS_MODE_ATOMIC))
-               return jtagdp_transaction_endcheck(swjdp);
-
-       return ERROR_OK;
-}
-
-int jtagdp_transaction_endcheck(struct swjdp_common *swjdp)
-{
-       int retval;
-       uint32_t ctrlstat;
-
-       /* too expensive to call keep_alive() here */
-
-#if 0
-       /* Danger!!!! BROKEN!!!! */
-       scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
-                       DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-       /* Danger!!!! BROKEN!!!! Why will jtag_execute_queue() fail here????
-       R956 introduced the check on return value here and now Michael Schwingen reports
-       that this code no longer works....
-
-       https://lists.berlios.de/pipermail/openocd-development/2008-September/003107.html
-       */
-       if ((retval = jtag_execute_queue()) != ERROR_OK)
-       {
-               LOG_ERROR("BUG: Why does this fail the first time????");
-       }
-       /* Why??? second time it works??? */
-#endif
-
-       /* Post CTRL/STAT read; discard any previous posted read value
-        * but collect its ACK status.
-        */
-       scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
-                       DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-       if ((retval = jtag_execute_queue()) != ERROR_OK)
-               return retval;
-
-       swjdp->ack = swjdp->ack & 0x7;
-
-       /* common code path avoids calling timeval_ms() */
-       if (swjdp->ack != JTAG_ACK_OK_FAULT)
-       {
-               long long then = timeval_ms();
-
-               while (swjdp->ack != JTAG_ACK_OK_FAULT)
-               {
-                       if (swjdp->ack == JTAG_ACK_WAIT)
-                       {
-                               if ((timeval_ms()-then) > 1000)
-                               {
-                                       /* NOTE:  this would be a good spot
-                                        * to use JTAG_DP_ABORT.
-                                        */
-                                       LOG_WARNING("Timeout (1000ms) waiting "
-                                               "for ACK=OK/FAULT "
-                                               "in JTAG-DP transaction");
-                                       return ERROR_JTAG_DEVICE_ERROR;
-                               }
-                       }
-                       else
-                       {
-                               LOG_WARNING("Invalid ACK %#x "
-                                               "in JTAG-DP transaction",
-                                               swjdp->ack);
-                               return ERROR_JTAG_DEVICE_ERROR;
-                       }
-
-                       scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
-                                       DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-                       if ((retval = jtag_execute_queue()) != ERROR_OK)
-                               return retval;
-                       swjdp->ack = swjdp->ack & 0x7;
-               }
-       }
-
-       /* REVISIT also STICKYCMP, for pushed comparisons (nyet used) */
-
-       /* Check for STICKYERR and STICKYORUN */
-       if (ctrlstat & (SSTICKYORUN | SSTICKYERR))
-       {
-               LOG_DEBUG("jtag-dp: CTRL/STAT error, 0x%" PRIx32, ctrlstat);
-               /* Check power to debug regions */
-               if ((ctrlstat & 0xf0000000) != 0xf0000000)
-                        ahbap_debugport_init(swjdp);
-               else
-               {
-                       uint32_t mem_ap_csw, mem_ap_tar;
-
-                       /* Maybe print information about last intended
-                        * MEM-AP access; but not if autoincrementing.
-                        * *Real* CSW and TAR values are always shown.
-                        */
-                       if (swjdp->ap_tar_value != (uint32_t) -1)
-                               LOG_DEBUG("MEM-AP Cached values: "
-                                       "ap_bank 0x%" PRIx32
-                                       ", ap_csw 0x%" PRIx32
-                                       ", ap_tar 0x%" PRIx32,
-                                       swjdp->ap_bank_value,
-                                       swjdp->ap_csw_value,
-                                       swjdp->ap_tar_value);
-
-                       if (ctrlstat & SSTICKYORUN)
-                               LOG_ERROR("JTAG-DP OVERRUN - check clock, "
-                                       "memaccess, or reduce jtag speed");
-
-                       if (ctrlstat & SSTICKYERR)
-                               LOG_ERROR("JTAG-DP STICKY ERROR");
-
-                       /* Clear Sticky Error Bits */
-                       scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
-                                       DP_CTRL_STAT, DPAP_WRITE,
-                                       swjdp->dp_ctrl_stat | SSTICKYORUN
-                                               | SSTICKYERR, NULL);
-                       scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
-                                       DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-                       if ((retval = jtag_execute_queue()) != ERROR_OK)
-                               return retval;
-
-                       LOG_DEBUG("jtag-dp: CTRL/STAT 0x%" PRIx32, ctrlstat);
-
-                       dap_ap_read_reg_u32(swjdp, AP_REG_CSW, &mem_ap_csw);
-                       dap_ap_read_reg_u32(swjdp, AP_REG_TAR, &mem_ap_tar);
-                       if ((retval = jtag_execute_queue()) != ERROR_OK)
-                               return retval;
-                       LOG_ERROR("MEM_AP_CSW 0x%" PRIx32 ", MEM_AP_TAR 0x%"
-                                       PRIx32, mem_ap_csw, mem_ap_tar);
-
-               }
-               if ((retval = jtag_execute_queue()) != ERROR_OK)
-                       return retval;
-               return ERROR_JTAG_DEVICE_ERROR;
-       }
-
-       return ERROR_OK;
+       return tar_autoincr_block - ((tar_autoincr_block - 1) & address);
 }
 
 /***************************************************************************
@@ -394,125 +94,60 @@ int jtagdp_transaction_endcheck(struct swjdp_common *swjdp)
  *                                                                         *
 ***************************************************************************/
 
-static int dap_dp_write_reg(struct swjdp_common *swjdp,
-               uint32_t value, uint8_t reg_addr)
-{
-       return scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
-                       reg_addr, DPAP_WRITE, value, NULL);
-}
-
-static int dap_dp_read_reg(struct swjdp_common *swjdp,
-               uint32_t *value, uint8_t reg_addr)
-{
-       return scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
-                       reg_addr, DPAP_READ, 0, value);
-}
-
 /**
  * Select one of the APs connected to the specified DAP.  The
  * selection is implicitly used with future AP transactions.
  * This is a NOP if the specified AP is already selected.
  *
- * @param swjdp The DAP
+ * @param dap The DAP
  * @param apsel Number of the AP to (implicitly) use with further
  *     transactions.  This normally identifies a MEM-AP.
  */
-void dap_ap_select(struct swjdp_common *swjdp,uint8_t apsel)
+void dap_ap_select(struct adiv5_dap *dap, uint8_t ap)
 {
-       uint32_t select = (apsel << 24) & 0xFF000000;
+       uint32_t new_ap = (ap << 24) & 0xFF000000;
 
-       if (select != swjdp->apsel)
-       {
-               swjdp->apsel = select;
+       if (new_ap != dap->ap_current) {
+               dap->ap_current = new_ap;
                /* Switching AP invalidates cached values.
                 * Values MUST BE UPDATED BEFORE AP ACCESS.
                 */
-               swjdp->ap_bank_value = -1;
-               swjdp->ap_csw_value = -1;
-               swjdp->ap_tar_value = -1;
+               dap->ap_bank_value = -1;
+               dap->ap_csw_value = -1;
+               dap->ap_tar_value = -1;
        }
 }
 
-/** Select the AP register bank matching bits 7:4 of ap_reg. */
-static int dap_ap_bankselect(struct swjdp_common *swjdp, uint32_t ap_reg)
+static int dap_setup_accessport_csw(struct adiv5_dap *dap, uint32_t csw)
 {
-       uint32_t select = (ap_reg & 0x000000F0);
-
-       if (select != swjdp->ap_bank_value)
-       {
-               swjdp->ap_bank_value = select;
-               select |= swjdp->apsel;
-               return dap_dp_write_reg(swjdp, select, DP_SELECT);
-       } else
-               return ERROR_OK;
-}
+       csw = csw | CSW_DBGSWENABLE | CSW_MASTER_DEBUG | CSW_HPROT |
+               dap->apcsw[dap->ap_current >> 24];
 
-static int dap_ap_write_reg(struct swjdp_common *swjdp,
-               uint32_t reg_addr, uint8_t *out_value_buf)
-{
-       dap_ap_bankselect(swjdp, reg_addr);
-       scan_inout_check(swjdp, JTAG_DP_APACC, reg_addr,
-                       DPAP_WRITE, out_value_buf, NULL);
-
-       /* FIXME return fault code from above calls */
-       return ERROR_OK;
-}
-
-/**
- * Write an AP register value.
- * This is synchronous iff the mode is set to ATOMIC, in which
- * case any queued transactions are flushed.
- *
- * @param swjdp The DAP whose currently selected AP will be written.
- * @param reg_addr Eight bit AP register address.
- * @param value Word to be written at reg_addr
- *
- * @return In synchronous mode: ERROR_OK for success, and the register holds
- * the specified value; else a fault code.  In asynchronous mode, a status
- * code reflecting whether the transaction was properly queued.
- */
-int dap_ap_write_reg_u32(struct swjdp_common *swjdp,
-               uint32_t reg_addr, uint32_t value)
-{
-       uint8_t out_value_buf[4];
-
-       buf_set_u32(out_value_buf, 0, 32, value);
-       dap_ap_bankselect(swjdp, reg_addr);
-       scan_inout_check(swjdp, JTAG_DP_APACC, reg_addr,
-                       DPAP_WRITE, out_value_buf, NULL);
-
-       /* FIXME return any fault code from above calls */
+       if (csw != dap->ap_csw_value) {
+               /* LOG_DEBUG("DAP: Set CSW %x",csw); */
+               int retval = dap_queue_ap_write(dap, AP_REG_CSW, csw);
+               if (retval != ERROR_OK)
+                       return retval;
+               dap->ap_csw_value = csw;
+       }
        return ERROR_OK;
 }
 
-/**
- * Read an AP register value.
- * This is synchronous iff the mode is set to ATOMIC, in which
- * case any queued transactions are flushed.
- *
- * @param swjdp The DAP whose currently selected AP will be read.
- * @param reg_addr Eight bit AP register address.
- * @param value Points to where the 32-bit (little-endian) word will be stored.
- *
- * @return In synchronous mode: ERROR_OK for success, and *value holds
- * the specified value; else a fault code.  In asynchronous mode, a status
- * code reflecting whether the transaction was properly queued.
- */
-int dap_ap_read_reg_u32(struct swjdp_common *swjdp,
-               uint32_t reg_addr, uint32_t *value)
+static int dap_setup_accessport_tar(struct adiv5_dap *dap, uint32_t tar)
 {
-       dap_ap_bankselect(swjdp, reg_addr);
-       scan_inout_check_u32(swjdp, JTAG_DP_APACC, reg_addr,
-                       DPAP_READ, 0, value);
-
-       /* FIXME return any fault code from above calls */
+       if (tar != dap->ap_tar_value || dap->ap_csw_value & CSW_ADDRINC_MASK) {
+               /* LOG_DEBUG("DAP: Set TAR %x",tar); */
+               int retval = dap_queue_ap_write(dap, AP_REG_TAR, tar);
+               if (retval != ERROR_OK)
+                       return retval;
+               dap->ap_tar_value = tar;
+       }
        return ERROR_OK;
 }
 
 /**
- * Set up transfer parameters for the currently selected MEM-AP.
- * This is synchronous iff the mode is set to ATOMIC, in which
- * case any queued transactions are flushed.
+ * Queue transactions setting up transfer parameters for the
+ * currently selected MEM-AP.
  *
  * Subsequent transfers using registers like AP_REG_DRW or AP_REG_BD2
  * initiate data reads or writes using memory or peripheral addresses.
@@ -521,43 +156,30 @@ int dap_ap_read_reg_u32(struct swjdp_common *swjdp,
  *
  * @todo Rename to reflect it being specifically a MEM-AP function.
  *
- * @param swjdp The DAP connected to the MEM-AP.
+ * @param dap The DAP connected to the MEM-AP.
  * @param csw MEM-AP Control/Status Word (CSW) register to assign.  If this
  *     matches the cached value, the register is not changed.
  * @param tar MEM-AP Transfer Address Register (TAR) to assign.  If this
  *     matches the cached address, the register is not changed.
  *
- * @return In synchronous mode: ERROR_OK for success, and the AP is set
- * up as requested else a fault code.  In asynchronous mode, a status
- * code reflecting whether the transaction was properly queued.
+ * @return ERROR_OK if the transaction was properly queued, else a fault code.
  */
-int dap_setup_accessport(struct swjdp_common *swjdp, uint32_t csw, uint32_t tar)
+int dap_setup_accessport(struct adiv5_dap *dap, uint32_t csw, uint32_t tar)
 {
-       csw = csw | CSW_DBGSWENABLE | CSW_MASTER_DEBUG | CSW_HPROT;
-       if (csw != swjdp->ap_csw_value)
-       {
-               /* LOG_DEBUG("DAP: Set CSW %x",csw); */
-               /* FIXME if this call fails, fail this procedure! */
-               dap_ap_write_reg_u32(swjdp, AP_REG_CSW, csw);
-               swjdp->ap_csw_value = csw;
-       }
-       if (tar != swjdp->ap_tar_value)
-       {
-               /* LOG_DEBUG("DAP: Set TAR %x",tar); */
-               /* FIXME if this call fails, fail this procedure! */
-               dap_ap_write_reg_u32(swjdp, AP_REG_TAR, tar);
-               swjdp->ap_tar_value = tar;
-       }
-       /* Disable TAR cache when autoincrementing */
-       if (csw & CSW_ADDRINC_MASK)
-               swjdp->ap_tar_value = -1;
+       int retval;
+       retval = dap_setup_accessport_csw(dap, csw);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = dap_setup_accessport_tar(dap, tar);
+       if (retval != ERROR_OK)
+               return retval;
        return ERROR_OK;
 }
 
 /**
  * Asynchronous (queued) read of a word from memory or a system register.
  *
- * @param swjdp The DAP connected to the MEM-AP performing the read.
+ * @param dap The DAP connected to the MEM-AP performing the read.
  * @param address Address of the 32-bit word to read; it must be
  *     readable by the currently selected MEM-AP.
  * @param value points to where the word will be stored when the
@@ -565,27 +187,27 @@ int dap_setup_accessport(struct swjdp_common *swjdp, uint32_t csw, uint32_t tar)
  *
  * @return ERROR_OK for success.  Otherwise a fault code.
  */
-int mem_ap_read_u32(struct swjdp_common *swjdp, uint32_t address,
+int mem_ap_read_u32(struct adiv5_dap *dap, uint32_t address,
                uint32_t *value)
 {
-       swjdp->trans_mode = TRANS_MODE_COMPOSITE;
+       int retval;
 
        /* Use banked addressing (REG_BDx) to avoid some link traffic
         * (updating TAR) when reading several consecutive addresses.
         */
-       dap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_OFF,
+       retval = dap_setup_accessport(dap, CSW_32BIT | CSW_ADDRINC_OFF,
                        address & 0xFFFFFFF0);
-       dap_ap_read_reg_u32(swjdp, AP_REG_BD0 | (address & 0xC), value);
+       if (retval != ERROR_OK)
+               return retval;
 
-       /* FIXME return any fault code from above calls */
-       return ERROR_OK;
+       return dap_queue_ap_read(dap, AP_REG_BD0 | (address & 0xC), value);
 }
 
 /**
  * Synchronous read of a word from memory or a system register.
  * As a side effect, this flushes any queued transactions.
  *
- * @param swjdp The DAP connected to the MEM-AP performing the read.
+ * @param dap The DAP connected to the MEM-AP performing the read.
  * @param address Address of the 32-bit word to read; it must be
  *     readable by the currently selected MEM-AP.
  * @param value points to where the result will be stored.
@@ -593,19 +215,22 @@ int mem_ap_read_u32(struct swjdp_common *swjdp, uint32_t address,
  * @return ERROR_OK for success; *value holds the result.
  * Otherwise a fault code.
  */
-int mem_ap_read_atomic_u32(struct swjdp_common *swjdp, uint32_t address,
+int mem_ap_read_atomic_u32(struct adiv5_dap *dap, uint32_t address,
                uint32_t *value)
 {
-       mem_ap_read_u32(swjdp, address, value);
-       /* FIXME return any fault code from above call */
+       int retval;
 
-       return jtagdp_transaction_endcheck(swjdp);
+       retval = mem_ap_read_u32(dap, address, value);
+       if (retval != ERROR_OK)
+               return retval;
+
+       return dap_run(dap);
 }
 
 /**
  * Asynchronous (queued) write of a word to memory or a system register.
  *
- * @param swjdp The DAP connected to the MEM-AP.
+ * @param dap The DAP connected to the MEM-AP.
  * @param address Address to be written; it must be writable by
  *     the currently selected MEM-AP.
  * @param value Word that will be written to the address when transaction
@@ -613,655 +238,696 @@ int mem_ap_read_atomic_u32(struct swjdp_common *swjdp, uint32_t address,
  *
  * @return ERROR_OK for success.  Otherwise a fault code.
  */
-int mem_ap_write_u32(struct swjdp_common *swjdp, uint32_t address,
+int mem_ap_write_u32(struct adiv5_dap *dap, uint32_t address,
                uint32_t value)
 {
-       swjdp->trans_mode = TRANS_MODE_COMPOSITE;
+       int retval;
 
        /* Use banked addressing (REG_BDx) to avoid some link traffic
         * (updating TAR) when writing several consecutive addresses.
         */
-       dap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_OFF,
+       retval = dap_setup_accessport(dap, CSW_32BIT | CSW_ADDRINC_OFF,
                        address & 0xFFFFFFF0);
-       dap_ap_write_reg_u32(swjdp, AP_REG_BD0 | (address & 0xC), value);
+       if (retval != ERROR_OK)
+               return retval;
 
-       /* FIXME return any fault code from above calls */
-       return ERROR_OK;
+       return dap_queue_ap_write(dap, AP_REG_BD0 | (address & 0xC),
+                       value);
 }
 
 /**
  * Synchronous write of a word to memory or a system register.
  * As a side effect, this flushes any queued transactions.
  *
- * @param swjdp The DAP connected to the MEM-AP.
+ * @param dap The DAP connected to the MEM-AP.
  * @param address Address to be written; it must be writable by
  *     the currently selected MEM-AP.
  * @param value Word that will be written.
  *
  * @return ERROR_OK for success; the data was written.  Otherwise a fault code.
  */
-int mem_ap_write_atomic_u32(struct swjdp_common *swjdp, uint32_t address,
+int mem_ap_write_atomic_u32(struct adiv5_dap *dap, uint32_t address,
                uint32_t value)
 {
-       mem_ap_write_u32(swjdp, address, value);
-       /* FIXME return any fault code from above call */
+       int retval = mem_ap_write_u32(dap, address, value);
+
+       if (retval != ERROR_OK)
+               return retval;
 
-       return jtagdp_transaction_endcheck(swjdp);
+       return dap_run(dap);
 }
 
-/*****************************************************************************
-*                                                                            *
-* mem_ap_write_buf(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address) *
-*                                                                            *
-* Write a buffer in target order (little endian)                             *
-*                                                                            *
-*****************************************************************************/
-int mem_ap_write_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
+/**
+ * Synchronous write of a block of memory, using a specific access size.
+ *
+ * @param dap The DAP connected to the MEM-AP.
+ * @param buffer The data buffer to write. No particular alignment is assumed.
+ * @param size Which access size to use, in bytes. 1, 2 or 4.
+ * @param count The number of writes to do (in size units, not bytes).
+ * @param address Address to be written; it must be writable by the currently selected MEM-AP.
+ * @param addrinc Whether the target address should be increased for each write or not. This
+ *  should normally be true, except when writing to e.g. a FIFO.
+ * @return ERROR_OK on success, otherwise an error code.
+ */
+int mem_ap_write(struct adiv5_dap *dap, const uint8_t *buffer, uint32_t size, uint32_t count,
+               uint32_t address, bool addrinc)
 {
-       int wcount, blocksize, writecount, errorcount = 0, retval = ERROR_OK;
-       uint32_t adr = address;
-       uint8_t* pBuffer = buffer;
+       size_t nbytes = size * count;
+       const uint32_t csw_addrincr = addrinc ? CSW_ADDRINC_SINGLE : CSW_ADDRINC_OFF;
+       uint32_t csw_size;
+       int retval;
 
-       swjdp->trans_mode = TRANS_MODE_COMPOSITE;
+       if (size == 4)
+               csw_size = CSW_32BIT;
+       else if (size == 2)
+               csw_size = CSW_16BIT;
+       else if (size == 1)
+               csw_size = CSW_8BIT;
+       else
+               return ERROR_TARGET_UNALIGNED_ACCESS;
 
-       count >>= 2;
-       wcount = count;
+       retval = dap_setup_accessport_tar(dap, address);
+       if (retval != ERROR_OK)
+               return retval;
 
-       /* if we have an unaligned access - reorder data */
-       if (adr & 0x3u)
-       {
-               for (writecount = 0; writecount < count; writecount++)
-               {
-                       int i;
-                       uint32_t outvalue;
-                       memcpy(&outvalue, pBuffer, sizeof(uint32_t));
-
-                       for (i = 0; i < 4; i++)
-                       {
-                               *((uint8_t*)pBuffer + (adr & 0x3)) = outvalue;
-                               outvalue >>= 8;
-                               adr++;
-                       }
-                       pBuffer += sizeof(uint32_t);
+       while (nbytes > 0) {
+               uint32_t this_size = size;
+
+               /* Select packed transfer if possible */
+               if (addrinc && dap->packed_transfers && nbytes >= 4
+                               && max_tar_block_size(dap->tar_autoincr_block, address) >= 4) {
+                       this_size = 4;
+                       retval = dap_setup_accessport_csw(dap, csw_size | CSW_ADDRINC_PACKED);
+               } else {
+                       retval = dap_setup_accessport_csw(dap, csw_size | csw_addrincr);
                }
-       }
 
-       while (wcount > 0)
-       {
-               /* Adjust to write blocks within boundaries aligned to the TAR autoincremnent size*/
-               blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
-               if (wcount < blocksize)
-                       blocksize = wcount;
+               if (retval != ERROR_OK)
+                       break;
+
+               /* How many source bytes each transfer will consume, and their location in the DRW,
+                * depends on the type of transfer and alignment. See ARM document IHI0031C. */
+               uint32_t outvalue = 0;
+               switch (this_size) {
+               case 4:
+                       outvalue |= (uint32_t)*buffer++ << 8 * (address++ & 3);
+                       outvalue |= (uint32_t)*buffer++ << 8 * (address++ & 3);
+               case 2:
+                       outvalue |= (uint32_t)*buffer++ << 8 * (address++ & 3);
+               case 1:
+                       outvalue |= (uint32_t)*buffer++ << 8 * (address++ & 3);
+               }
 
-               /* handle unaligned data at 4k boundary */
-               if (blocksize == 0)
-                       blocksize = 1;
+               nbytes -= this_size;
 
-               dap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_SINGLE, address);
+               retval = dap_queue_ap_write(dap, AP_REG_DRW, outvalue);
+               if (retval != ERROR_OK)
+                       break;
 
-               for (writecount = 0; writecount < blocksize; writecount++)
-               {
-                       dap_ap_write_reg(swjdp, AP_REG_DRW, buffer + 4 * writecount);
+               /* Rewrite TAR if it wrapped */
+               if (addrinc && address % dap->tar_autoincr_block < size && nbytes > 0) {
+                       retval = dap_setup_accessport_tar(dap, address);
+                       if (retval != ERROR_OK)
+                               break;
                }
+       }
 
-               if (jtagdp_transaction_endcheck(swjdp) == ERROR_OK)
-               {
-                       wcount = wcount - blocksize;
-                       address = address + 4 * blocksize;
-                       buffer = buffer + 4 * blocksize;
-               }
-               else
-               {
-                       errorcount++;
-               }
+       /* REVISIT: Might want to have a queued version of this function that does not run. */
+       if (retval == ERROR_OK)
+               retval = dap_run(dap);
 
-               if (errorcount > 1)
-               {
-                       LOG_WARNING("Block write error address 0x%" PRIx32 ", wcount 0x%x", address, wcount);
-                       return ERROR_JTAG_DEVICE_ERROR;
-               }
+       if (retval != ERROR_OK) {
+               uint32_t tar;
+               if (dap_queue_ap_read(dap, AP_REG_TAR, &tar) == ERROR_OK
+                               && dap_run(dap) == ERROR_OK)
+                       LOG_ERROR("Failed to write memory at 0x%08"PRIx32, tar);
+               else
+                       LOG_ERROR("Failed to write memory and, additionally, failed to find out where");
        }
 
        return retval;
 }
 
-static int mem_ap_write_buf_packed_u16(struct swjdp_common *swjdp,
-               uint8_t *buffer, int count, uint32_t address)
+/* Compatibility wrappers around mem_ap_write(). Note that the count is in bytes for these. */
+int mem_ap_write_buf_u32(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address, bool addr_incr)
 {
-       int retval = ERROR_OK;
-       int wcount, blocksize, writecount, i;
-
-       swjdp->trans_mode = TRANS_MODE_COMPOSITE;
-
-       wcount = count >> 1;
-
-       while (wcount > 0)
-       {
-               int nbytes;
-
-               /* Adjust to write blocks within boundaries aligned to the TAR autoincremnent size*/
-               blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
-
-               if (wcount < blocksize)
-                       blocksize = wcount;
-
-               /* handle unaligned data at 4k boundary */
-               if (blocksize == 0)
-                       blocksize = 1;
-
-               dap_setup_accessport(swjdp, CSW_16BIT | CSW_ADDRINC_PACKED, address);
-               writecount = blocksize;
-
-               do
-               {
-                       nbytes = MIN((writecount << 1), 4);
-
-                       if (nbytes < 4)
-                       {
-                               if (mem_ap_write_buf_u16(swjdp, buffer,
-                                               nbytes, address) != ERROR_OK)
-                               {
-                                       LOG_WARNING("Block write error address "
-                                               "0x%" PRIx32 ", count 0x%x",
-                                               address, count);
-                                       return ERROR_JTAG_DEVICE_ERROR;
-                               }
-
-                               address += nbytes >> 1;
-                       }
-                       else
-                       {
-                               uint32_t outvalue;
-                               memcpy(&outvalue, buffer, sizeof(uint32_t));
-
-                               for (i = 0; i < nbytes; i++)
-                               {
-                                       *((uint8_t*)buffer + (address & 0x3)) = outvalue;
-                                       outvalue >>= 8;
-                                       address++;
-                               }
-
-                               memcpy(&outvalue, buffer, sizeof(uint32_t));
-                               dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue);
-                               if (jtagdp_transaction_endcheck(swjdp) != ERROR_OK)
-                               {
-                                       LOG_WARNING("Block write error address "
-                                               "0x%" PRIx32 ", count 0x%x",
-                                               address, count);
-                                       return ERROR_JTAG_DEVICE_ERROR;
-                               }
-                       }
-
-                       buffer += nbytes >> 1;
-                       writecount -= nbytes >> 1;
-
-               } while (writecount);
-               wcount -= blocksize;
-       }
-
-       return retval;
+       return mem_ap_write(dap, buffer, 4, count / 4, address, true);
 }
 
-int mem_ap_write_buf_u16(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
+int mem_ap_write_buf_u16(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address)
 {
-       int retval = ERROR_OK;
-
-       if (count >= 4)
-               return mem_ap_write_buf_packed_u16(swjdp, buffer, count, address);
-
-       swjdp->trans_mode = TRANS_MODE_COMPOSITE;
-
-       while (count > 0)
-       {
-               dap_setup_accessport(swjdp, CSW_16BIT | CSW_ADDRINC_SINGLE, address);
-               uint16_t svalue;
-               memcpy(&svalue, buffer, sizeof(uint16_t));
-               uint32_t outvalue = (uint32_t)svalue << 8 * (address & 0x3);
-               dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue);
-               retval = jtagdp_transaction_endcheck(swjdp);
-               count -= 2;
-               address += 2;
-               buffer += 2;
-       }
-
-       return retval;
+       return mem_ap_write(dap, buffer, 2, count / 2, address, true);
 }
 
-static int mem_ap_write_buf_packed_u8(struct swjdp_common *swjdp,
-               uint8_t *buffer, int count, uint32_t address)
+int mem_ap_write_buf_u8(struct adiv5_dap *dap, const uint8_t *buffer, int count, uint32_t address)
 {
-       int retval = ERROR_OK;
-       int wcount, blocksize, writecount, i;
+       return mem_ap_write(dap, buffer, 1, count, address, true);
+}
 
-       swjdp->trans_mode = TRANS_MODE_COMPOSITE;
+/**
+ * Synchronous read of a block of memory, using a specific access size.
+ *
+ * @param dap The DAP connected to the MEM-AP.
+ * @param buffer The data buffer to receive the data. No particular alignment is assumed.
+ * @param size Which access size to use, in bytes. 1, 2 or 4.
+ * @param count The number of reads to do (in size units, not bytes).
+ * @param address Address to be read; it must be readable by the currently selected MEM-AP.
+ * @param addrinc Whether the target address should be increased after each read or not. This
+ *  should normally be true, except when reading from e.g. a FIFO.
+ * @return ERROR_OK on success, otherwise an error code.
+ */
+int mem_ap_read(struct adiv5_dap *dap, uint8_t *buffer, uint32_t size, uint32_t count,
+               uint32_t adr, bool addrinc)
+{
+       size_t nbytes = size * count;
+       const uint32_t csw_addrincr = addrinc ? CSW_ADDRINC_SINGLE : CSW_ADDRINC_OFF;
+       uint32_t csw_size;
+       uint32_t address = adr;
+       int retval;
 
-       wcount = count;
+       if (size == 4)
+               csw_size = CSW_32BIT;
+       else if (size == 2)
+               csw_size = CSW_16BIT;
+       else if (size == 1)
+               csw_size = CSW_8BIT;
+       else
+               return ERROR_TARGET_UNALIGNED_ACCESS;
+
+       /* Allocate buffer to hold the sequence of DRW reads that will be made. This is a significant
+        * over-allocation if packed transfers are going to be used, but determining the real need at
+        * this point would be messy. */
+       uint32_t *read_buf = malloc(count * sizeof(uint32_t));
+       uint32_t *read_ptr = read_buf;
+       if (read_buf == NULL) {
+               LOG_ERROR("Failed to allocate read buffer");
+               return ERROR_FAIL;
+       }
 
-       while (wcount > 0)
-       {
-               int nbytes;
+       retval = dap_setup_accessport_tar(dap, address);
+       if (retval != ERROR_OK)
+               return retval;
 
-               /* Adjust to write blocks within boundaries aligned to the TAR autoincremnent size*/
-               blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
+       /* Queue up all reads. Each read will store the entire DRW word in the read buffer. How many
+        * useful bytes it contains, and their location in the word, depends on the type of transfer
+        * and alignment. */
+       while (nbytes > 0) {
+               uint32_t this_size = size;
+
+               /* Select packed transfer if possible */
+               if (addrinc && dap->packed_transfers && nbytes >= 4
+                               && max_tar_block_size(dap->tar_autoincr_block, address) >= 4) {
+                       this_size = 4;
+                       retval = dap_setup_accessport_csw(dap, csw_size | CSW_ADDRINC_PACKED);
+               } else {
+                       retval = dap_setup_accessport_csw(dap, csw_size | csw_addrincr);
+               }
+               if (retval != ERROR_OK)
+                       break;
 
-               if (wcount < blocksize)
-                       blocksize = wcount;
+               retval = dap_queue_ap_read(dap, AP_REG_DRW, read_ptr++);
+               if (retval != ERROR_OK)
+                       break;
 
-               dap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_PACKED, address);
-               writecount = blocksize;
+               nbytes -= this_size;
+               address += this_size;
 
-               do
-               {
-                       nbytes = MIN(writecount, 4);
+               /* Rewrite TAR if it wrapped */
+               if (addrinc && address % dap->tar_autoincr_block < size && nbytes > 0) {
+                       retval = dap_setup_accessport_tar(dap, address);
+                       if (retval != ERROR_OK)
+                               break;
+               }
+       }
 
-                       if (nbytes < 4)
-                       {
-                               if (mem_ap_write_buf_u8(swjdp, buffer, nbytes, address) != ERROR_OK)
-                               {
-                                       LOG_WARNING("Block write error address "
-                                               "0x%" PRIx32 ", count 0x%x",
-                                               address, count);
-                                       return ERROR_JTAG_DEVICE_ERROR;
-                               }
+       if (retval == ERROR_OK)
+               retval = dap_run(dap);
+
+       /* Restore state */
+       address = adr;
+       nbytes = size * count;
+       read_ptr = read_buf;
+
+       /* If something failed, read TAR to find out how much data was successfully read, so we can
+        * at least give the caller what we have. */
+       if (retval != ERROR_OK) {
+               uint32_t tar;
+               if (dap_queue_ap_read(dap, AP_REG_TAR, &tar) == ERROR_OK
+                               && dap_run(dap) == ERROR_OK) {
+                       LOG_ERROR("Failed to read memory at 0x%08"PRIx32, tar);
+                       if (nbytes > tar - address)
+                               nbytes = tar - address;
+               } else {
+                       LOG_ERROR("Failed to read memory and, additionally, failed to find out where");
+                       nbytes = 0;
+               }
+       }
 
-                               address += nbytes;
-                       }
-                       else
-                       {
-                               uint32_t outvalue;
-                               memcpy(&outvalue, buffer, sizeof(uint32_t));
-
-                               for (i = 0; i < nbytes; i++)
-                               {
-                                       *((uint8_t*)buffer + (address & 0x3)) = outvalue;
-                                       outvalue >>= 8;
-                                       address++;
-                               }
+       /* Replay loop to populate caller's buffer from the correct word and byte lane */
+       while (nbytes > 0) {
+               uint32_t this_size = size;
 
-                               memcpy(&outvalue, buffer, sizeof(uint32_t));
-                               dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue);
-                               if (jtagdp_transaction_endcheck(swjdp) != ERROR_OK)
-                               {
-                                       LOG_WARNING("Block write error address "
-                                               "0x%" PRIx32 ", count 0x%x",
-                                               address, count);
-                                       return ERROR_JTAG_DEVICE_ERROR;
-                               }
-                       }
+               if (addrinc && dap->packed_transfers && nbytes >= 4
+                               && max_tar_block_size(dap->tar_autoincr_block, address) >= 4) {
+                       this_size = 4;
+               }
 
-                       buffer += nbytes;
-                       writecount -= nbytes;
+               switch (this_size) {
+               case 4:
+                       *buffer++ = *read_ptr >> 8 * (address++ & 3);
+                       *buffer++ = *read_ptr >> 8 * (address++ & 3);
+               case 2:
+                       *buffer++ = *read_ptr >> 8 * (address++ & 3);
+               case 1:
+                       *buffer++ = *read_ptr >> 8 * (address++ & 3);
+               }
 
-               } while (writecount);
-               wcount -= blocksize;
+               read_ptr++;
+               nbytes -= this_size;
        }
 
+       free(read_buf);
        return retval;
 }
 
-int mem_ap_write_buf_u8(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
+/* Compatibility wrappers around mem_ap_read(). Note that the count is in bytes for these (despite
+ * what their doxygen documentation said). */
+int mem_ap_read_buf_u32(struct adiv5_dap *dap, uint8_t *buffer,
+               int count, uint32_t address, bool addr_incr)
 {
-       int retval = ERROR_OK;
+       return mem_ap_read(dap, buffer, 4, count / 4, address, addr_incr);
+}
 
-       if (count >= 4)
-               return mem_ap_write_buf_packed_u8(swjdp, buffer, count, address);
+int mem_ap_read_buf_u16(struct adiv5_dap *dap, uint8_t *buffer,
+               int count, uint32_t address)
+{
+       return mem_ap_read(dap, buffer, 2, count / 2, address, true);
+}
 
-       swjdp->trans_mode = TRANS_MODE_COMPOSITE;
+int mem_ap_read_buf_u8(struct adiv5_dap *dap, uint8_t *buffer,
+               int count, uint32_t address)
+{
+       return mem_ap_read(dap, buffer, 1, count, address, true);
+}
 
-       while (count > 0)
-       {
-               dap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_SINGLE, address);
-               uint32_t outvalue = (uint32_t)*buffer << 8 * (address & 0x3);
-               dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue);
-               retval = jtagdp_transaction_endcheck(swjdp);
-               count--;
-               address++;
-               buffer++;
-       }
+/*--------------------------------------------------------------------*/
+/*          Wrapping function with selection of AP                    */
+/*--------------------------------------------------------------------*/
+int mem_ap_sel_read_u32(struct adiv5_dap *swjdp, uint8_t ap,
+               uint32_t address, uint32_t *value)
+{
+       dap_ap_select(swjdp, ap);
+       return mem_ap_read_u32(swjdp, address, value);
+}
 
-       return retval;
+int mem_ap_sel_write_u32(struct adiv5_dap *swjdp, uint8_t ap,
+               uint32_t address, uint32_t value)
+{
+       dap_ap_select(swjdp, ap);
+       return mem_ap_write_u32(swjdp, address, value);
 }
 
-/*********************************************************************************
-*                                                                                *
-* mem_ap_read_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)  *
-*                                                                                *
-* Read block fast in target order (little endian) into a buffer                  *
-*                                                                                *
-**********************************************************************************/
-int mem_ap_read_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
+int mem_ap_sel_read_atomic_u32(struct adiv5_dap *swjdp, uint8_t ap,
+               uint32_t address, uint32_t *value)
 {
-       int wcount, blocksize, readcount, errorcount = 0, retval = ERROR_OK;
-       uint32_t adr = address;
-       uint8_t* pBuffer = buffer;
+       dap_ap_select(swjdp, ap);
+       return mem_ap_read_atomic_u32(swjdp, address, value);
+}
 
-       swjdp->trans_mode = TRANS_MODE_COMPOSITE;
+int mem_ap_sel_write_atomic_u32(struct adiv5_dap *swjdp, uint8_t ap,
+               uint32_t address, uint32_t value)
+{
+       dap_ap_select(swjdp, ap);
+       return mem_ap_write_atomic_u32(swjdp, address, value);
+}
 
-       count >>= 2;
-       wcount = count;
+int mem_ap_sel_read_buf_u8(struct adiv5_dap *swjdp, uint8_t ap,
+               uint8_t *buffer, int count, uint32_t address)
+{
+       dap_ap_select(swjdp, ap);
+       return mem_ap_read_buf_u8(swjdp, buffer, count, address);
+}
 
-       while (wcount > 0)
-       {
-               /* Adjust to read blocks within boundaries aligned to the TAR autoincremnent size*/
-               blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
-               if (wcount < blocksize)
-                       blocksize = wcount;
-
-               /* handle unaligned data at 4k boundary */
-               if (blocksize == 0)
-                       blocksize = 1;
-
-               dap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_SINGLE, address);
-
-               /* Scan out first read */
-               adi_jtag_dp_scan(swjdp, JTAG_DP_APACC, AP_REG_DRW,
-                               DPAP_READ, 0, NULL, NULL);
-               for (readcount = 0; readcount < blocksize - 1; readcount++)
-               {
-                       /* Scan out next read; scan in posted value for the
-                        * previous one.  Assumes read is acked "OK/FAULT",
-                        * and CTRL_STAT says that meant "OK".
-                        */
-                       adi_jtag_dp_scan(swjdp, JTAG_DP_APACC, AP_REG_DRW,
-                                       DPAP_READ, 0, buffer + 4 * readcount,
-                                       &swjdp->ack);
-               }
+int mem_ap_sel_read_buf_u16(struct adiv5_dap *swjdp, uint8_t ap,
+               uint8_t *buffer, int count, uint32_t address)
+{
+       dap_ap_select(swjdp, ap);
+       return mem_ap_read_buf_u16(swjdp, buffer, count, address);
+}
 
-               /* Scan in last posted value; RDBUFF has no other effect,
-                * assuming ack is OK/FAULT and CTRL_STAT says "OK".
-                */
-               adi_jtag_dp_scan(swjdp, JTAG_DP_DPACC, DP_RDBUFF,
-                               DPAP_READ, 0, buffer + 4 * readcount,
-                               &swjdp->ack);
-               if (jtagdp_transaction_endcheck(swjdp) == ERROR_OK)
-               {
-                       wcount = wcount - blocksize;
-                       address += 4 * blocksize;
-                       buffer += 4 * blocksize;
-               }
-               else
-               {
-                       errorcount++;
-               }
+int mem_ap_sel_read_buf_u32_noincr(struct adiv5_dap *swjdp, uint8_t ap,
+               uint8_t *buffer, int count, uint32_t address)
+{
+       dap_ap_select(swjdp, ap);
+       return mem_ap_read_buf_u32(swjdp, buffer, count, address, false);
+}
 
-               if (errorcount > 1)
-               {
-                       LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
-                       return ERROR_JTAG_DEVICE_ERROR;
-               }
-       }
+int mem_ap_sel_read_buf_u32(struct adiv5_dap *swjdp, uint8_t ap,
+               uint8_t *buffer, int count, uint32_t address)
+{
+       dap_ap_select(swjdp, ap);
+       return mem_ap_read_buf_u32(swjdp, buffer, count, address, true);
+}
 
-       /* if we have an unaligned access - reorder data */
-       if (adr & 0x3u)
-       {
-               for (readcount = 0; readcount < count; readcount++)
-               {
-                       int i;
-                       uint32_t data;
-                       memcpy(&data, pBuffer, sizeof(uint32_t));
-
-                       for (i = 0; i < 4; i++)
-                       {
-                               *((uint8_t*)pBuffer) = (data >> 8 * (adr & 0x3));
-                               pBuffer++;
-                               adr++;
-                       }
-               }
-       }
+int mem_ap_sel_write_buf_u8(struct adiv5_dap *swjdp, uint8_t ap,
+               const uint8_t *buffer, int count, uint32_t address)
+{
+       dap_ap_select(swjdp, ap);
+       return mem_ap_write_buf_u8(swjdp, buffer, count, address);
+}
 
-       return retval;
+int mem_ap_sel_write_buf_u16(struct adiv5_dap *swjdp, uint8_t ap,
+               const uint8_t *buffer, int count, uint32_t address)
+{
+       dap_ap_select(swjdp, ap);
+       return mem_ap_write_buf_u16(swjdp, buffer, count, address);
 }
 
-static int mem_ap_read_buf_packed_u16(struct swjdp_common *swjdp,
-               uint8_t *buffer, int count, uint32_t address)
+int mem_ap_sel_write_buf_u32(struct adiv5_dap *swjdp, uint8_t ap,
+               const uint8_t *buffer, int count, uint32_t address)
 {
-       uint32_t invalue;
-       int retval = ERROR_OK;
-       int wcount, blocksize, readcount, i;
+       dap_ap_select(swjdp, ap);
+       return mem_ap_write_buf_u32(swjdp, buffer, count, address, true);
+}
 
-       swjdp->trans_mode = TRANS_MODE_COMPOSITE;
+int mem_ap_sel_write_buf_u32_noincr(struct adiv5_dap *swjdp, uint8_t ap,
+               const uint8_t *buffer, int count, uint32_t address)
+{
+       dap_ap_select(swjdp, ap);
+       return mem_ap_write_buf_u32(swjdp, buffer, count, address, false);
+}
 
-       wcount = count >> 1;
+#define MDM_REG_STAT           0x00
+#define MDM_REG_CTRL           0x04
+#define MDM_REG_ID             0xfc
+
+#define MDM_STAT_FMEACK                (1<<0)
+#define MDM_STAT_FREADY                (1<<1)
+#define MDM_STAT_SYSSEC                (1<<2)
+#define MDM_STAT_SYSRES                (1<<3)
+#define MDM_STAT_FMEEN         (1<<5)
+#define MDM_STAT_BACKDOOREN    (1<<6)
+#define MDM_STAT_LPEN          (1<<7)
+#define MDM_STAT_VLPEN         (1<<8)
+#define MDM_STAT_LLSMODEXIT    (1<<9)
+#define MDM_STAT_VLLSXMODEXIT  (1<<10)
+#define MDM_STAT_CORE_HALTED   (1<<16)
+#define MDM_STAT_CORE_SLEEPDEEP        (1<<17)
+#define MDM_STAT_CORESLEEPING  (1<<18)
+
+#define MEM_CTRL_FMEIP         (1<<0)
+#define MEM_CTRL_DBG_DIS       (1<<1)
+#define MEM_CTRL_DBG_REQ       (1<<2)
+#define MEM_CTRL_SYS_RES_REQ   (1<<3)
+#define MEM_CTRL_CORE_HOLD_RES (1<<4)
+#define MEM_CTRL_VLLSX_DBG_REQ (1<<5)
+#define MEM_CTRL_VLLSX_DBG_ACK (1<<6)
+#define MEM_CTRL_VLLSX_STAT_ACK        (1<<7)
+
+#define MDM_ACCESS_TIMEOUT     3000 /* ms */
 
-       while (wcount > 0)
-       {
-               int nbytes;
-
-               /* Adjust to read blocks within boundaries aligned to the TAR autoincremnent size*/
-               blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
-               if (wcount < blocksize)
-                       blocksize = wcount;
-
-               dap_setup_accessport(swjdp, CSW_16BIT | CSW_ADDRINC_PACKED, address);
-
-               /* handle unaligned data at 4k boundary */
-               if (blocksize == 0)
-                       blocksize = 1;
-               readcount = blocksize;
-
-               do
-               {
-                       dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue);
-                       if (jtagdp_transaction_endcheck(swjdp) != ERROR_OK)
-                       {
-                               LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
-                               return ERROR_JTAG_DEVICE_ERROR;
-                       }
+/**
+ *
+ */
+int dap_syssec_kinetis_mdmap(struct adiv5_dap *dap)
+{
+       uint32_t val;
+       int retval;
+       int timeout = 0;
+       enum reset_types jtag_reset_config = jtag_get_reset_config();
 
-                       nbytes = MIN((readcount << 1), 4);
+       dap_ap_select(dap, 1);
 
-                       for (i = 0; i < nbytes; i++)
-                       {
-                               *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3));
-                               buffer++;
-                               address++;
-                       }
+       /* first check mdm-ap id register */
+       retval = dap_queue_ap_read(dap, MDM_REG_ID, &val);
+       if (retval != ERROR_OK)
+               return retval;
+       dap_run(dap);
 
-                       readcount -= (nbytes >> 1);
-               } while (readcount);
-               wcount -= blocksize;
+       if (val != 0x001C0000) {
+               LOG_DEBUG("id doesn't match %08" PRIX32 " != 0x001C0000", val);
+               dap_ap_select(dap, 0);
+               return ERROR_FAIL;
        }
 
-       return retval;
-}
-
-int mem_ap_read_buf_u16(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
-{
-       uint32_t invalue, i;
-       int retval = ERROR_OK;
-
-       if (count >= 4)
-               return mem_ap_read_buf_packed_u16(swjdp, buffer, count, address);
+       /* read and parse status register
+        * it's important that the device is out of
+        * reset here
+        */
+       while (1) {
+               if (timeout++ > MDM_ACCESS_TIMEOUT) {
+                       LOG_DEBUG("MDMAP : flash ready timeout");
+                       return ERROR_FAIL;
+               }
+               retval = dap_queue_ap_read(dap, MDM_REG_STAT, &val);
+               if (retval != ERROR_OK)
+                       return retval;
+               dap_run(dap);
 
-       swjdp->trans_mode = TRANS_MODE_COMPOSITE;
+               LOG_DEBUG("MDM_REG_STAT %08" PRIX32, val);
+               if (val & MDM_STAT_FREADY)
+                       break;
+               alive_sleep(1);
+       }
 
-       while (count > 0)
-       {
-               dap_setup_accessport(swjdp, CSW_16BIT | CSW_ADDRINC_SINGLE, address);
-               dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue);
-               retval = jtagdp_transaction_endcheck(swjdp);
-               if (address & 0x1)
-               {
-                       for (i = 0; i < 2; i++)
-                       {
-                               *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3));
-                               buffer++;
-                               address++;
+       if ((val & MDM_STAT_SYSSEC)) {
+               LOG_DEBUG("MDMAP: system is secured, masserase needed");
+
+               if (!(val & MDM_STAT_FMEEN))
+                       LOG_DEBUG("MDMAP: masserase is disabled");
+               else {
+                       /* we need to assert reset */
+                       if (jtag_reset_config & RESET_HAS_SRST) {
+                               /* default to asserting srst */
+                               adapter_assert_reset();
+                       } else {
+                               LOG_DEBUG("SRST not configured");
+                               dap_ap_select(dap, 0);
+                               return ERROR_FAIL;
+                       }
+                       timeout = 0;
+                       while (1) {
+                               if (timeout++ > MDM_ACCESS_TIMEOUT) {
+                                       LOG_DEBUG("MDMAP : flash ready timeout");
+                                       return ERROR_FAIL;
+                               }
+                               retval = dap_queue_ap_write(dap, MDM_REG_CTRL, MEM_CTRL_FMEIP);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               dap_run(dap);
+                               /* read status register and wait for ready */
+                               retval = dap_queue_ap_read(dap, MDM_REG_STAT, &val);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               dap_run(dap);
+                               LOG_DEBUG("MDM_REG_STAT %08" PRIX32, val);
+
+                               if ((val & 1))
+                                       break;
+                               alive_sleep(1);
+                       }
+                       timeout = 0;
+                       while (1) {
+                               if (timeout++ > MDM_ACCESS_TIMEOUT) {
+                                       LOG_DEBUG("MDMAP : flash ready timeout");
+                                       return ERROR_FAIL;
+                               }
+                               retval = dap_queue_ap_write(dap, MDM_REG_CTRL, 0);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               dap_run(dap);
+                               /* read status register */
+                               retval = dap_queue_ap_read(dap, MDM_REG_STAT, &val);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               dap_run(dap);
+                               LOG_DEBUG("MDM_REG_STAT %08" PRIX32, val);
+                               /* read control register and wait for ready */
+                               retval = dap_queue_ap_read(dap, MDM_REG_CTRL, &val);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               dap_run(dap);
+                               LOG_DEBUG("MDM_REG_CTRL %08" PRIX32, val);
+
+                               if (val == 0x00)
+                                       break;
+                               alive_sleep(1);
                        }
                }
-               else
-               {
-                       uint16_t svalue = (invalue >> 8 * (address & 0x3));
-                       memcpy(buffer, &svalue, sizeof(uint16_t));
-                       address += 2;
-                       buffer += 2;
-               }
-               count -= 2;
        }
 
-       return retval;
+       dap_ap_select(dap, 0);
+
+       return ERROR_OK;
 }
 
-/* FIX!!! is this a potential performance bottleneck w.r.t. requiring too many
- * roundtrips when jtag_execute_queue() has a large overhead(e.g. for USB)s?
+/** */
+struct dap_syssec_filter {
+       /** */
+       uint32_t idcode;
+       /** */
+       int (*dap_init)(struct adiv5_dap *dap);
+};
+
+/** */
+static struct dap_syssec_filter dap_syssec_filter_data[] = {
+       { 0x4BA00477, dap_syssec_kinetis_mdmap }
+};
+
+/**
  *
- * The solution is to arrange for a large out/in scan in this loop and
- * and convert data afterwards.
  */
-static int mem_ap_read_buf_packed_u8(struct swjdp_common *swjdp,
-               uint8_t *buffer, int count, uint32_t address)
+int dap_syssec(struct adiv5_dap *dap)
 {
-       uint32_t invalue;
-       int retval = ERROR_OK;
-       int wcount, blocksize, readcount, i;
-
-       swjdp->trans_mode = TRANS_MODE_COMPOSITE;
-
-       wcount = count;
-
-       while (wcount > 0)
-       {
-               int nbytes;
-
-               /* Adjust to read blocks within boundaries aligned to the TAR autoincremnent size*/
-               blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
+       unsigned int i;
+       struct jtag_tap *tap;
 
-               if (wcount < blocksize)
-                       blocksize = wcount;
+       for (i = 0; i < sizeof(dap_syssec_filter_data); i++) {
+               tap = dap->jtag_info->tap;
 
-               dap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_PACKED, address);
-               readcount = blocksize;
-
-               do
-               {
-                       dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue);
-                       if (jtagdp_transaction_endcheck(swjdp) != ERROR_OK)
-                       {
-                               LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
-                               return ERROR_JTAG_DEVICE_ERROR;
-                       }
-
-                       nbytes = MIN(readcount, 4);
-
-                       for (i = 0; i < nbytes; i++)
-                       {
-                               *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3));
-                               buffer++;
-                               address++;
+               while (tap != NULL) {
+                       if (tap->hasidcode && (dap_syssec_filter_data[i].idcode == tap->idcode)) {
+                               LOG_DEBUG("DAP: mdmap_init for idcode: %08" PRIx32, tap->idcode);
+                               dap_syssec_filter_data[i].dap_init(dap);
                        }
-
-                       readcount -= nbytes;
-               } while (readcount);
-               wcount -= blocksize;
+                       tap = tap->next_tap;
+               }
        }
 
-       return retval;
+       return ERROR_OK;
 }
 
-int mem_ap_read_buf_u8(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
-{
-       uint32_t invalue;
-       int retval = ERROR_OK;
-
-       if (count >= 4)
-               return mem_ap_read_buf_packed_u8(swjdp, buffer, count, address);
+/*--------------------------------------------------------------------------*/
 
-       swjdp->trans_mode = TRANS_MODE_COMPOSITE;
 
-       while (count > 0)
-       {
-               dap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_SINGLE, address);
-               dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue);
-               retval = jtagdp_transaction_endcheck(swjdp);
-               *((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3));
-               count--;
-               address++;
-               buffer++;
-       }
+/* FIXME don't import ... just initialize as
+ * part of DAP transport setup
+*/
+extern const struct dap_ops jtag_dp_ops;
 
-       return retval;
-}
+/*--------------------------------------------------------------------------*/
 
 /**
  * Initialize a DAP.  This sets up the power domains, prepares the DP
  * for further use, and arranges to use AP #0 for all AP operations
  * until dap_ap-select() changes that policy.
  *
- * @param swjdp The DAP being initialized.
+ * @param dap The DAP being initialized.
  *
  * @todo Rename this.  We also need an initialization scheme which account
  * for SWD transports not just JTAG; that will need to address differences
  * in layering.  (JTAG is useful without any debug target; but not SWD.)
  * And this may not even use an AHB-AP ... e.g. DAP-Lite uses an APB-AP.
  */
-int ahbap_debugport_init(struct swjdp_common *swjdp)
+int ahbap_debugport_init(struct adiv5_dap *dap)
 {
-       uint32_t idreg, romaddr, dummy;
        uint32_t ctrlstat;
        int cnt = 0;
        int retval;
 
        LOG_DEBUG(" ");
 
+       /* JTAG-DP or SWJ-DP, in JTAG mode
+        * ... for SWD mode this is patched as part
+        * of link switchover
+        */
+       if (!dap->ops)
+               dap->ops = &jtag_dp_ops;
+
        /* Default MEM-AP setup.
         *
         * REVISIT AP #0 may be an inappropriate default for this.
         * Should we probe, or take a hint from the caller?
         * Presumably we can ignore the possibility of multiple APs.
         */
-       swjdp->apsel = !0;
-       dap_ap_select(swjdp, 0);
+       dap->ap_current = !0;
+       dap_ap_select(dap, 0);
 
        /* DP initialization */
-       swjdp->trans_mode = TRANS_MODE_ATOMIC;
-       dap_dp_read_reg(swjdp, &dummy, DP_CTRL_STAT);
-       dap_dp_write_reg(swjdp, SSTICKYERR, DP_CTRL_STAT);
-       dap_dp_read_reg(swjdp, &dummy, DP_CTRL_STAT);
 
-       swjdp->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ;
+       retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL);
+       if (retval != ERROR_OK)
+               return retval;
+
+       retval = dap_queue_dp_write(dap, DP_CTRL_STAT, SSTICKYERR);
+       if (retval != ERROR_OK)
+               return retval;
+
+       retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL);
+       if (retval != ERROR_OK)
+               return retval;
 
-       dap_dp_write_reg(swjdp, swjdp->dp_ctrl_stat, DP_CTRL_STAT);
-       dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
-       if ((retval = jtag_execute_queue()) != ERROR_OK)
+       dap->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ;
+       retval = dap_queue_dp_write(dap, DP_CTRL_STAT, dap->dp_ctrl_stat);
+       if (retval != ERROR_OK)
+               return retval;
+
+       retval = dap_queue_dp_read(dap, DP_CTRL_STAT, &ctrlstat);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = dap_run(dap);
+       if (retval != ERROR_OK)
                return retval;
 
        /* Check that we have debug power domains activated */
-       while (!(ctrlstat & CDBGPWRUPACK) && (cnt++ < 10))
-       {
+       while (!(ctrlstat & CDBGPWRUPACK) && (cnt++ < 10)) {
                LOG_DEBUG("DAP: wait CDBGPWRUPACK");
-               dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
-               if ((retval = jtag_execute_queue()) != ERROR_OK)
+               retval = dap_queue_dp_read(dap, DP_CTRL_STAT, &ctrlstat);
+               if (retval != ERROR_OK)
+                       return retval;
+               retval = dap_run(dap);
+               if (retval != ERROR_OK)
                        return retval;
                alive_sleep(10);
        }
 
-       while (!(ctrlstat & CSYSPWRUPACK) && (cnt++ < 10))
-       {
+       while (!(ctrlstat & CSYSPWRUPACK) && (cnt++ < 10)) {
                LOG_DEBUG("DAP: wait CSYSPWRUPACK");
-               dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
-               if ((retval = jtag_execute_queue()) != ERROR_OK)
+               retval = dap_queue_dp_read(dap, DP_CTRL_STAT, &ctrlstat);
+               if (retval != ERROR_OK)
+                       return retval;
+               retval = dap_run(dap);
+               if (retval != ERROR_OK)
                        return retval;
                alive_sleep(10);
        }
 
-       dap_dp_read_reg(swjdp, &dummy, DP_CTRL_STAT);
+       retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL);
+       if (retval != ERROR_OK)
+               return retval;
        /* With debug power on we can activate OVERRUN checking */
-       swjdp->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ | CORUNDETECT;
-       dap_dp_write_reg(swjdp, swjdp->dp_ctrl_stat, DP_CTRL_STAT);
-       dap_dp_read_reg(swjdp, &dummy, DP_CTRL_STAT);
-
-       /*
-        * REVISIT this isn't actually *initializing* anything in an AP,
-        * and doesn't care if it's a MEM-AP at all (much less AHB-AP).
-        * Should it?  If the ROM address is valid, is this the right
-        * place to scan the table and do any topology detection?
-        */
-       dap_ap_read_reg_u32(swjdp, AP_REG_IDR, &idreg);
-       dap_ap_read_reg_u32(swjdp, AP_REG_BASE, &romaddr);
+       dap->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ | CORUNDETECT;
+       retval = dap_queue_dp_write(dap, DP_CTRL_STAT, dap->dp_ctrl_stat);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL);
+       if (retval != ERROR_OK)
+               return retval;
+
+       dap_syssec(dap);
+
+       /* check that we support packed transfers */
+       uint32_t csw;
+
+       retval = dap_setup_accessport(dap, CSW_8BIT | CSW_ADDRINC_PACKED, 0);
+       if (retval != ERROR_OK)
+               return retval;
+
+       retval = dap_queue_ap_read(dap, AP_REG_CSW, &csw);
+       if (retval != ERROR_OK)
+               return retval;
+
+       retval = dap_run(dap);
+       if (retval != ERROR_OK)
+               return retval;
+
+       if (csw & CSW_ADDRINC_PACKED)
+               dap->packed_transfers = true;
+       else
+               dap->packed_transfers = false;
 
-       LOG_DEBUG("MEM-AP #%d ID Register 0x%" PRIx32
-               ", Debug ROM Address 0x%" PRIx32,
-               swjdp->apsel, idreg, romaddr);
+       LOG_DEBUG("MEM_AP Packed Transfers: %s",
+                       dap->packed_transfers ? "enabled" : "disabled");
 
        return ERROR_OK;
 }
@@ -1269,46 +935,181 @@ int ahbap_debugport_init(struct swjdp_common *swjdp)
 /* CID interpretation -- see ARM IHI 0029B section 3
  * and ARM IHI 0031A table 13-3.
  */
-static const char *class_description[16] ={
+static const char *class_description[16] = {
        "Reserved", "ROM table", "Reserved", "Reserved",
        "Reserved", "Reserved", "Reserved", "Reserved",
        "Reserved", "CoreSight component", "Reserved", "Peripheral Test Block",
        "Reserved", "OptimoDE DESS",
-               "Generic IP component", "PrimeCell or System component"
+       "Generic IP component", "PrimeCell or System component"
 };
 
-static bool
-is_dap_cid_ok(uint32_t cid3, uint32_t cid2, uint32_t cid1, uint32_t cid0)
+static bool is_dap_cid_ok(uint32_t cid3, uint32_t cid2, uint32_t cid1, uint32_t cid0)
 {
        return cid3 == 0xb1 && cid2 == 0x05
                        && ((cid1 & 0x0f) == 0) && cid0 == 0x0d;
 }
 
-int dap_info_command(struct command_context *cmd_ctx,
-               struct swjdp_common *swjdp, int apsel)
+/*
+ * This function checks the ID for each access port to find the requested Access Port type
+ */
+int dap_find_ap(struct adiv5_dap *dap, enum ap_type type_to_find, uint8_t *ap_num_out)
 {
+       int ap;
+
+       /* Maximum AP number is 255 since the SELECT register is 8 bits */
+       for (ap = 0; ap <= 255; ap++) {
 
+               /* read the IDR register of the Access Port */
+               uint32_t id_val = 0;
+               dap_ap_select(dap, ap);
+
+               int retval = dap_queue_ap_read(dap, AP_REG_IDR, &id_val);
+               if (retval != ERROR_OK)
+                       return retval;
+
+               retval = dap_run(dap);
+
+               /* IDR bits:
+                * 31-28 : Revision
+                * 27-24 : JEDEC bank (0x4 for ARM)
+                * 23-17 : JEDEC code (0x3B for ARM)
+                * 16    : Mem-AP
+                * 15-8  : Reserved
+                *  7-0  : AP Identity (1=AHB-AP 2=APB-AP 0x10=JTAG-AP)
+                */
+
+               /* Reading register for a non-existant AP should not cause an error,
+                * but just to be sure, try to continue searching if an error does happen.
+                */
+               if ((retval == ERROR_OK) &&                  /* Register read success */
+                       ((id_val & 0x0FFF0000) == 0x04770000) && /* Jedec codes match */
+                       ((id_val & 0xFF) == type_to_find)) {     /* type matches*/
+
+                       LOG_DEBUG("Found %s at AP index: %d (IDR=0x%08" PRIX32 ")",
+                                               (type_to_find == AP_TYPE_AHB_AP)  ? "AHB-AP"  :
+                                               (type_to_find == AP_TYPE_APB_AP)  ? "APB-AP"  :
+                                               (type_to_find == AP_TYPE_JTAG_AP) ? "JTAG-AP" : "Unknown",
+                                               ap, id_val);
+
+                       *ap_num_out = ap;
+                       return ERROR_OK;
+               }
+       }
+
+       LOG_DEBUG("No %s found",
+                               (type_to_find == AP_TYPE_AHB_AP)  ? "AHB-AP"  :
+                               (type_to_find == AP_TYPE_APB_AP)  ? "APB-AP"  :
+                               (type_to_find == AP_TYPE_JTAG_AP) ? "JTAG-AP" : "Unknown");
+       return ERROR_FAIL;
+}
+
+int dap_get_debugbase(struct adiv5_dap *dap, int ap,
+                       uint32_t *out_dbgbase, uint32_t *out_apid)
+{
+       uint32_t ap_old;
+       int retval;
        uint32_t dbgbase, apid;
+
+       /* AP address is in bits 31:24 of DP_SELECT */
+       if (ap >= 256)
+               return ERROR_COMMAND_SYNTAX_ERROR;
+
+       ap_old = dap->ap_current;
+       dap_ap_select(dap, ap);
+
+       retval = dap_queue_ap_read(dap, AP_REG_BASE, &dbgbase);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = dap_run(dap);
+       if (retval != ERROR_OK)
+               return retval;
+
+       /* Excavate the device ID code */
+       struct jtag_tap *tap = dap->jtag_info->tap;
+       while (tap != NULL) {
+               if (tap->hasidcode)
+                       break;
+               tap = tap->next_tap;
+       }
+       if (tap == NULL || !tap->hasidcode)
+               return ERROR_OK;
+
+       dap_ap_select(dap, ap_old);
+
+       /* The asignment happens only here to prevent modification of these
+        * values before they are certain. */
+       *out_dbgbase = dbgbase;
+       *out_apid = apid;
+
+       return ERROR_OK;
+}
+
+int dap_lookup_cs_component(struct adiv5_dap *dap, int ap,
+                       uint32_t dbgbase, uint8_t type, uint32_t *addr)
+{
+       uint32_t ap_old;
+       uint32_t romentry, entry_offset = 0, component_base, devtype;
+       int retval = ERROR_FAIL;
+
+       if (ap >= 256)
+               return ERROR_COMMAND_SYNTAX_ERROR;
+
+       ap_old = dap->ap_current;
+       dap_ap_select(dap, ap);
+
+       do {
+               retval = mem_ap_read_atomic_u32(dap, (dbgbase&0xFFFFF000) |
+                                               entry_offset, &romentry);
+               if (retval != ERROR_OK)
+                       return retval;
+
+               component_base = (dbgbase & 0xFFFFF000)
+                       + (romentry & 0xFFFFF000);
+
+               if (romentry & 0x1) {
+                       retval = mem_ap_read_atomic_u32(dap,
+                                       (component_base & 0xfffff000) | 0xfcc,
+                                       &devtype);
+                       if (retval != ERROR_OK)
+                               return retval;
+                       if ((devtype & 0xff) == type) {
+                               *addr = component_base;
+                               retval = ERROR_OK;
+                               break;
+                       }
+               }
+               entry_offset += 4;
+       } while (romentry > 0);
+
+       dap_ap_select(dap, ap_old);
+
+       return retval;
+}
+
+static int dap_info_command(struct command_context *cmd_ctx,
+               struct adiv5_dap *dap, int ap)
+{
+       int retval;
+       uint32_t dbgbase = 0, apid = 0; /* Silence gcc by initializing */
        int romtable_present = 0;
        uint8_t mem_ap;
-       uint32_t apselold;
+       uint32_t ap_old;
+
+       retval = dap_get_debugbase(dap, ap, &dbgbase, &apid);
+       if (retval != ERROR_OK)
+               return retval;
+
+       ap_old = dap->ap_current;
+       dap_ap_select(dap, ap);
 
-       /* AP address is in bits 31:24 of DP_SELECT */
-       if (apsel >= 256)
-               return ERROR_INVALID_ARGUMENTS;
-
-       apselold = swjdp->apsel;
-       dap_ap_select(swjdp, apsel);
-       dap_ap_read_reg_u32(swjdp, AP_REG_BASE, &dbgbase);
-       dap_ap_read_reg_u32(swjdp, AP_REG_IDR, &apid);
-       jtagdp_transaction_endcheck(swjdp);
        /* Now we read ROM table ID registers, ref. ARM IHI 0029B sec  */
        mem_ap = ((apid&0x10000) && ((apid&0x0F) != 0));
        command_print(cmd_ctx, "AP ID register 0x%8.8" PRIx32, apid);
-       if (apid)
-       {
-               switch (apid&0x0F)
-               {
+       if (apid) {
+               switch (apid&0x0F) {
                        case 0:
                                command_print(cmd_ctx, "\tType is JTAG-AP");
                                break;
@@ -1327,18 +1128,13 @@ int dap_info_command(struct command_context *cmd_ctx,
                 * not a ROM table ... or have no such components at all.
                 */
                if (mem_ap)
-                       command_print(cmd_ctx, "AP BASE 0x%8.8" PRIx32,
-                                       dbgbase);
-       }
-       else
-       {
-               command_print(cmd_ctx, "No AP found at this apsel 0x%x", apsel);
-       }
+                       command_print(cmd_ctx, "AP BASE 0x%8.8" PRIx32, dbgbase);
+       } else
+               command_print(cmd_ctx, "No AP found at this ap 0x%x", ap);
 
        romtable_present = ((mem_ap) && (dbgbase != 0xFFFFFFFF));
-       if (romtable_present)
-       {
-               uint32_t cid0,cid1,cid2,cid3,memtype,romentry;
+       if (romtable_present) {
+               uint32_t cid0, cid1, cid2, cid3, memtype, romentry;
                uint16_t entry_offset;
 
                /* bit 16 of apid indicates a memory access port */
@@ -1348,18 +1144,32 @@ int dap_info_command(struct command_context *cmd_ctx,
                        command_print(cmd_ctx, "\tROM table in legacy format");
 
                /* Now we read ROM table ID registers, ref. ARM IHI 0029B sec  */
-               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000) | 0xFF0, &cid0);
-               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000) | 0xFF4, &cid1);
-               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000) | 0xFF8, &cid2);
-               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000) | 0xFFC, &cid3);
-               mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000) | 0xFCC, &memtype);
-               jtagdp_transaction_endcheck(swjdp);
+               retval = mem_ap_read_u32(dap, (dbgbase&0xFFFFF000) | 0xFF0, &cid0);
+               if (retval != ERROR_OK)
+                       return retval;
+               retval = mem_ap_read_u32(dap, (dbgbase&0xFFFFF000) | 0xFF4, &cid1);
+               if (retval != ERROR_OK)
+                       return retval;
+               retval = mem_ap_read_u32(dap, (dbgbase&0xFFFFF000) | 0xFF8, &cid2);
+               if (retval != ERROR_OK)
+                       return retval;
+               retval = mem_ap_read_u32(dap, (dbgbase&0xFFFFF000) | 0xFFC, &cid3);
+               if (retval != ERROR_OK)
+                       return retval;
+               retval = mem_ap_read_u32(dap, (dbgbase&0xFFFFF000) | 0xFCC, &memtype);
+               if (retval != ERROR_OK)
+                       return retval;
+               retval = dap_run(dap);
+               if (retval != ERROR_OK)
+                       return retval;
+
                if (!is_dap_cid_ok(cid3, cid2, cid1, cid0))
-                       command_print(cmd_ctx, "\tCID3 0x%2.2" PRIx32
-                                       ", CID2 0x%2.2" PRIx32
-                                       ", CID1 0x%2.2" PRIx32
-                                       ", CID0 0x%2.2" PRIx32,
-                                       cid3, cid2, cid1, cid0);
+                       command_print(cmd_ctx, "\tCID3 0x%2.2x"
+                                       ", CID2 0x%2.2x"
+                                       ", CID1 0x%2.2x"
+                                       ", CID0 0x%2.2x",
+                                       (unsigned) cid3, (unsigned)cid2,
+                                       (unsigned) cid1, (unsigned) cid0);
                if (memtype & 0x01)
                        command_print(cmd_ctx, "\tMEMTYPE system memory present on bus");
                else
@@ -1368,43 +1178,63 @@ int dap_info_command(struct command_context *cmd_ctx,
 
                /* Now we read ROM table entries from dbgbase&0xFFFFF000) | 0x000 until we get 0x00000000 */
                entry_offset = 0;
-               do
-               {
-                       mem_ap_read_atomic_u32(swjdp, (dbgbase&0xFFFFF000) | entry_offset, &romentry);
-                       command_print(cmd_ctx, "\tROMTABLE[0x%x] = 0x%" PRIx32 "",entry_offset,romentry);
-                       if (romentry&0x01)
-                       {
+               do {
+                       retval = mem_ap_read_atomic_u32(dap, (dbgbase&0xFFFFF000) | entry_offset, &romentry);
+                       if (retval != ERROR_OK)
+                               return retval;
+                       command_print(cmd_ctx, "\tROMTABLE[0x%x] = 0x%" PRIx32 "", entry_offset, romentry);
+                       if (romentry & 0x01) {
                                uint32_t c_cid0, c_cid1, c_cid2, c_cid3;
                                uint32_t c_pid0, c_pid1, c_pid2, c_pid3, c_pid4;
-                               uint32_t component_start, component_base;
+                               uint32_t component_base;
                                unsigned part_num;
                                char *type, *full;
 
-                               component_base = (uint32_t)((dbgbase & 0xFFFFF000)
-                                               + (int)(romentry & 0xFFFFF000));
-                               mem_ap_read_atomic_u32(swjdp,
-                                               (component_base & 0xFFFFF000) | 0xFE0, &c_pid0);
-                               mem_ap_read_atomic_u32(swjdp,
-                                               (component_base & 0xFFFFF000) | 0xFE4, &c_pid1);
-                               mem_ap_read_atomic_u32(swjdp,
-                                               (component_base & 0xFFFFF000) | 0xFE8, &c_pid2);
-                               mem_ap_read_atomic_u32(swjdp,
-                                               (component_base & 0xFFFFF000) | 0xFEC, &c_pid3);
-                               mem_ap_read_atomic_u32(swjdp,
-                                               (component_base & 0xFFFFF000) | 0xFD0, &c_pid4);
-                               mem_ap_read_atomic_u32(swjdp,
-                                               (component_base & 0xFFFFF000) | 0xFF0, &c_cid0);
-                               mem_ap_read_atomic_u32(swjdp,
-                                               (component_base & 0xFFFFF000) | 0xFF4, &c_cid1);
-                               mem_ap_read_atomic_u32(swjdp,
-                                               (component_base & 0xFFFFF000) | 0xFF8, &c_cid2);
-                               mem_ap_read_atomic_u32(swjdp,
-                                               (component_base & 0xFFFFF000) | 0xFFC, &c_cid3);
-                               component_start = component_base - 0x1000*(c_pid4 >> 4);
-
-                               command_print(cmd_ctx, "\t\tComponent base address 0x%" PRIx32
-                                               ", start address 0x%" PRIx32,
-                                               component_base, component_start);
+                               component_base = (dbgbase & 0xFFFFF000) + (romentry & 0xFFFFF000);
+
+                               /* IDs are in last 4K section */
+                               retval = mem_ap_read_atomic_u32(dap, component_base + 0xFE0, &c_pid0);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               c_pid0 &= 0xff;
+                               retval = mem_ap_read_atomic_u32(dap, component_base + 0xFE4, &c_pid1);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               c_pid1 &= 0xff;
+                               retval = mem_ap_read_atomic_u32(dap, component_base + 0xFE8, &c_pid2);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               c_pid2 &= 0xff;
+                               retval = mem_ap_read_atomic_u32(dap, component_base + 0xFEC, &c_pid3);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               c_pid3 &= 0xff;
+                               retval = mem_ap_read_atomic_u32(dap, component_base + 0xFD0, &c_pid4);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               c_pid4 &= 0xff;
+
+                               retval = mem_ap_read_atomic_u32(dap, component_base + 0xFF0, &c_cid0);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               c_cid0 &= 0xff;
+                               retval = mem_ap_read_atomic_u32(dap, component_base + 0xFF4, &c_cid1);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               c_cid1 &= 0xff;
+                               retval = mem_ap_read_atomic_u32(dap, component_base + 0xFF8, &c_cid2);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               c_cid2 &= 0xff;
+                               retval = mem_ap_read_atomic_u32(dap, component_base + 0xFFC, &c_cid3);
+                               if (retval != ERROR_OK)
+                                       return retval;
+                               c_cid3 &= 0xff;
+
+                               command_print(cmd_ctx, "\t\tComponent base address 0x%" PRIx32 ","
+                                               "start address 0x%" PRIx32, component_base,
+                               /* component may take multiple 4K pages */
+                               component_base - 0x1000*(c_pid4 >> 4));
                                command_print(cmd_ctx, "\t\tComponent class is 0x%x, %s",
                                                (int) (c_cid1 >> 4) & 0xf,
                                                /* See ARM IHI 0029B Table 3-3 */
@@ -1416,9 +1246,11 @@ int dap_info_command(struct command_context *cmd_ctx,
                                        unsigned minor;
                                        char *major = "Reserved", *subtype = "Reserved";
 
-                                       mem_ap_read_atomic_u32(swjdp,
+                                       retval = mem_ap_read_atomic_u32(dap,
                                                        (component_base & 0xfffff000) | 0xfcc,
                                                        &devtype);
+                                       if (retval != ERROR_OK)
+                                               return retval;
                                        minor = (devtype >> 4) & 0x0f;
                                        switch (devtype & 0x0f) {
                                        case 0:
@@ -1522,23 +1354,28 @@ int dap_info_command(struct command_context *cmd_ctx,
                                }
 
                                if (!is_dap_cid_ok(cid3, cid2, cid1, cid0))
-                                       command_print(cmd_ctx, "\t\tCID3 0x%2.2" PRIx32
-                                                       ", CID2 0x%2.2" PRIx32
-                                                       ", CID1 0x%2.2" PRIx32
-                                                       ", CID0 0x%2.2" PRIx32,
-                                                       c_cid3, c_cid2, c_cid1, c_cid0);
-                               command_print(cmd_ctx, "\t\tPeripheral ID[4..0] = hex "
-                                               "%2.2x %2.2x %2.2x %2.2x %2.2x",
-                                               (int) c_pid4,
-                                               (int) c_pid3, (int) c_pid2,
-                                               (int) c_pid1, (int) c_pid0);
+                                       command_print(cmd_ctx,
+                                                       "\t\tCID3 0%2.2x"
+                                                       ", CID2 0%2.2x"
+                                                       ", CID1 0%2.2x"
+                                                       ", CID0 0%2.2x",
+                                                       (int) c_cid3,
+                                                       (int) c_cid2,
+                                                       (int)c_cid1,
+                                                       (int)c_cid0);
+                               command_print(cmd_ctx,
+                               "\t\tPeripheral ID[4..0] = hex "
+                               "%2.2x %2.2x %2.2x %2.2x %2.2x",
+                               (int) c_pid4, (int) c_pid3, (int) c_pid2,
+                               (int) c_pid1, (int) c_pid0);
 
                                /* Part number interpretations are from Cortex
                                 * core specs, the CoreSight components TRM
-                                * (ARM DDI 0314H), and ETM specs; also from
-                                * chip observation (e.g. TI SDTI).
+                                * (ARM DDI 0314H), CoreSight System Design
+                                * Guide (ARM DGI 0012D) and ETM specs; also
+                                * from chip observation (e.g. TI SDTI).
                                 */
-                               part_num = c_pid0 & 0xff;
+                               part_num = (c_pid0 & 0xff);
                                part_num |= (c_pid1 & 0x0f) << 8;
                                switch (part_num) {
                                case 0x000:
@@ -1557,11 +1394,15 @@ int dap_info_command(struct command_context *cmd_ctx,
                                        type = "Cortex-M3 FBP";
                                        full = "(Flash Patch and Breakpoint)";
                                        break;
+                               case 0x00c:
+                                       type = "Cortex-M4 SCS";
+                                       full = "(System Control Space)";
+                                       break;
                                case 0x00d:
                                        type = "CoreSight ETM11";
                                        full = "(Embedded Trace)";
                                        break;
-                               // case 0x113: what?
+                               /* case 0x113: what? */
                                case 0x120:             /* from OMAP3 memmap */
                                        type = "TI SDTI";
                                        full = "(System Debug Trace Interface)";
@@ -1570,10 +1411,6 @@ int dap_info_command(struct command_context *cmd_ctx,
                                        type = "TI DAPCTL";
                                        full = "";
                                        break;
-                               case 0x4e0:
-                                       type = "Cortex-M3 ETM";
-                                       full = "(Embedded Trace)";
-                                       break;
                                case 0x906:
                                        type = "Coresight CTI";
                                        full = "(Cross Trigger)";
@@ -1606,6 +1443,22 @@ int dap_info_command(struct command_context *cmd_ctx,
                                        type = "Cortex-M3 TPIU";
                                        full = "(Trace Port Interface Unit)";
                                        break;
+                               case 0x924:
+                                       type = "Cortex-M3 ETM";
+                                       full = "(Embedded Trace)";
+                                       break;
+                               case 0x925:
+                                       type = "Cortex-M4 ETM";
+                                       full = "(Embedded Trace)";
+                                       break;
+                               case 0x930:
+                                       type = "Cortex-R4 ETM";
+                                       full = "(Embedded Trace)";
+                                       break;
+                               case 0x9a1:
+                                       type = "Cortex-M4 TPUI";
+                                       full = "(Trace Port Interface Unit)";
+                                       break;
                                case 0xc08:
                                        type = "Cortex-A8 Debug";
                                        full = "(Debug Unit)";
@@ -1617,9 +1470,7 @@ int dap_info_command(struct command_context *cmd_ctx,
                                }
                                command_print(cmd_ctx, "\t\tPart is %s %s",
                                                type, full);
-                       }
-                       else
-                       {
+                       } else {
                                if (romentry)
                                        command_print(cmd_ctx, "\t\tComponent not present");
                                else
@@ -1627,61 +1478,87 @@ int dap_info_command(struct command_context *cmd_ctx,
                        }
                        entry_offset += 4;
                } while (romentry > 0);
-       }
-       else
-       {
+       } else
                command_print(cmd_ctx, "\tNo ROM table present");
-       }
-       dap_ap_select(swjdp, apselold);
+       dap_ap_select(dap, ap_old);
 
        return ERROR_OK;
 }
 
-DAP_COMMAND_HANDLER(dap_baseaddr_command)
+COMMAND_HANDLER(handle_dap_info_command)
+{
+       struct target *target = get_current_target(CMD_CTX);
+       struct arm *arm = target_to_arm(target);
+       struct adiv5_dap *dap = arm->dap;
+       uint32_t apsel;
+
+       switch (CMD_ARGC) {
+       case 0:
+               apsel = dap->apsel;
+               break;
+       case 1:
+               COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
+               break;
+       default:
+               return ERROR_COMMAND_SYNTAX_ERROR;
+       }
+
+       return dap_info_command(CMD_CTX, dap, apsel);
+}
+
+COMMAND_HANDLER(dap_baseaddr_command)
 {
-       uint32_t apsel, apselsave, baseaddr;
+       struct target *target = get_current_target(CMD_CTX);
+       struct arm *arm = target_to_arm(target);
+       struct adiv5_dap *dap = arm->dap;
+
+       uint32_t apsel, baseaddr;
        int retval;
 
-       apselsave = swjdp->apsel;
        switch (CMD_ARGC) {
        case 0:
-               apsel = swjdp->apsel;
+               apsel = dap->apsel;
                break;
        case 1:
                COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
                /* AP address is in bits 31:24 of DP_SELECT */
                if (apsel >= 256)
-                       return ERROR_INVALID_ARGUMENTS;
+                       return ERROR_COMMAND_SYNTAX_ERROR;
                break;
        default:
                return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
-       if (apselsave != apsel)
-               dap_ap_select(swjdp, apsel);
+       dap_ap_select(dap, apsel);
 
        /* NOTE:  assumes we're talking to a MEM-AP, which
         * has a base address.  There are other kinds of AP,
         * though they're not common for now.  This should
         * use the ID register to verify it's a MEM-AP.
         */
-       dap_ap_read_reg_u32(swjdp, AP_REG_BASE, &baseaddr);
-       retval = jtagdp_transaction_endcheck(swjdp);
-       command_print(CMD_CTX, "0x%8.8" PRIx32, baseaddr);
+       retval = dap_queue_ap_read(dap, AP_REG_BASE, &baseaddr);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = dap_run(dap);
+       if (retval != ERROR_OK)
+               return retval;
 
-       if (apselsave != apsel)
-               dap_ap_select(swjdp, apselsave);
+       command_print(CMD_CTX, "0x%8.8" PRIx32, baseaddr);
 
        return retval;
 }
 
-DAP_COMMAND_HANDLER(dap_memaccess_command)
+COMMAND_HANDLER(dap_memaccess_command)
 {
+       struct target *target = get_current_target(CMD_CTX);
+       struct arm *arm = target_to_arm(target);
+       struct adiv5_dap *dap = arm->dap;
+
        uint32_t memaccess_tck;
 
        switch (CMD_ARGC) {
        case 0:
-               memaccess_tck = swjdp->memaccess_tck;
+               memaccess_tck = dap->memaccess_tck;
                break;
        case 1:
                COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], memaccess_tck);
@@ -1689,16 +1566,20 @@ DAP_COMMAND_HANDLER(dap_memaccess_command)
        default:
                return ERROR_COMMAND_SYNTAX_ERROR;
        }
-       swjdp->memaccess_tck = memaccess_tck;
+       dap->memaccess_tck = memaccess_tck;
 
        command_print(CMD_CTX, "memory bus access delay set to %" PRIi32 " tck",
-                       swjdp->memaccess_tck);
+                       dap->memaccess_tck);
 
        return ERROR_OK;
 }
 
-DAP_COMMAND_HANDLER(dap_apsel_command)
+COMMAND_HANDLER(dap_apsel_command)
 {
+       struct target *target = get_current_target(CMD_CTX);
+       struct arm *arm = target_to_arm(target);
+       struct adiv5_dap *dap = arm->dap;
+
        uint32_t apsel, apid;
        int retval;
 
@@ -1710,49 +1591,157 @@ DAP_COMMAND_HANDLER(dap_apsel_command)
                COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
                /* AP address is in bits 31:24 of DP_SELECT */
                if (apsel >= 256)
-                       return ERROR_INVALID_ARGUMENTS;
+                       return ERROR_COMMAND_SYNTAX_ERROR;
                break;
        default:
                return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
-       dap_ap_select(swjdp, apsel);
-       dap_ap_read_reg_u32(swjdp, AP_REG_IDR, &apid);
-       retval = jtagdp_transaction_endcheck(swjdp);
+       dap->apsel = apsel;
+       dap_ap_select(dap, apsel);
+
+       retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = dap_run(dap);
+       if (retval != ERROR_OK)
+               return retval;
+
        command_print(CMD_CTX, "ap %" PRIi32 " selected, identification register 0x%8.8" PRIx32,
                        apsel, apid);
 
        return retval;
 }
 
-DAP_COMMAND_HANDLER(dap_apid_command)
+COMMAND_HANDLER(dap_apcsw_command)
+{
+       struct target *target = get_current_target(CMD_CTX);
+       struct arm *arm = target_to_arm(target);
+       struct adiv5_dap *dap = arm->dap;
+
+       uint32_t apcsw = dap->apcsw[dap->apsel], sprot = 0;
+
+       switch (CMD_ARGC) {
+       case 0:
+               command_print(CMD_CTX, "apsel %" PRIi32 " selected, csw 0x%8.8" PRIx32,
+                       (dap->apsel), apcsw);
+               break;
+       case 1:
+               COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], sprot);
+               /* AP address is in bits 31:24 of DP_SELECT */
+               if (sprot > 1)
+                       return ERROR_COMMAND_SYNTAX_ERROR;
+               if (sprot)
+                       apcsw |= CSW_SPROT;
+               else
+                       apcsw &= ~CSW_SPROT;
+               break;
+       default:
+               return ERROR_COMMAND_SYNTAX_ERROR;
+       }
+       dap->apcsw[dap->apsel] = apcsw;
+
+       return 0;
+}
+
+
+
+COMMAND_HANDLER(dap_apid_command)
 {
-       uint32_t apsel, apselsave, apid;
+       struct target *target = get_current_target(CMD_CTX);
+       struct arm *arm = target_to_arm(target);
+       struct adiv5_dap *dap = arm->dap;
+
+       uint32_t apsel, apid;
        int retval;
 
-       apselsave = swjdp->apsel;
        switch (CMD_ARGC) {
        case 0:
-               apsel = swjdp->apsel;
+               apsel = dap->apsel;
                break;
        case 1:
                COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
                /* AP address is in bits 31:24 of DP_SELECT */
                if (apsel >= 256)
-                       return ERROR_INVALID_ARGUMENTS;
+                       return ERROR_COMMAND_SYNTAX_ERROR;
                break;
        default:
                return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
-       if (apselsave != apsel)
-               dap_ap_select(swjdp, apsel);
+       dap_ap_select(dap, apsel);
+
+       retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = dap_run(dap);
+       if (retval != ERROR_OK)
+               return retval;
 
-       dap_ap_read_reg_u32(swjdp, AP_REG_IDR, &apid);
-       retval = jtagdp_transaction_endcheck(swjdp);
        command_print(CMD_CTX, "0x%8.8" PRIx32, apid);
-       if (apselsave != apsel)
-               dap_ap_select(swjdp, apselsave);
 
        return retval;
 }
+
+static const struct command_registration dap_commands[] = {
+       {
+               .name = "info",
+               .handler = handle_dap_info_command,
+               .mode = COMMAND_EXEC,
+               .help = "display ROM table for MEM-AP "
+                       "(default currently selected AP)",
+               .usage = "[ap_num]",
+       },
+       {
+               .name = "apsel",
+               .handler = dap_apsel_command,
+               .mode = COMMAND_EXEC,
+               .help = "Set the currently selected AP (default 0) "
+                       "and display the result",
+               .usage = "[ap_num]",
+       },
+       {
+               .name = "apcsw",
+               .handler = dap_apcsw_command,
+               .mode = COMMAND_EXEC,
+               .help = "Set csw access bit ",
+               .usage = "[sprot]",
+       },
+
+       {
+               .name = "apid",
+               .handler = dap_apid_command,
+               .mode = COMMAND_EXEC,
+               .help = "return ID register from AP "
+                       "(default currently selected AP)",
+               .usage = "[ap_num]",
+       },
+       {
+               .name = "baseaddr",
+               .handler = dap_baseaddr_command,
+               .mode = COMMAND_EXEC,
+               .help = "return debug base address from MEM-AP "
+                       "(default currently selected AP)",
+               .usage = "[ap_num]",
+       },
+       {
+               .name = "memaccess",
+               .handler = dap_memaccess_command,
+               .mode = COMMAND_EXEC,
+               .help = "set/get number of extra tck for MEM-AP memory "
+                       "bus access [0-255]",
+               .usage = "[cycles]",
+       },
+       COMMAND_REGISTRATION_DONE
+};
+
+const struct command_registration dap_command_handlers[] = {
+       {
+               .name = "dap",
+               .mode = COMMAND_EXEC,
+               .help = "DAP command group",
+               .usage = "",
+               .chain = dap_commands,
+       },
+       COMMAND_REGISTRATION_DONE
+};