Transform 'u16' to 'uint16_t'

[fw/openocd] / src / target / arm9tdmi.c

diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index 63846cf29acba45756d4d281d25821fd86a857ea..dc11d7c07a25b1343e7b8ab506e0bde1b65244de 100644 (file)
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -28,6 +28,7 @@
 #endif
 
 #include "arm9tdmi.h"
+#include "target_type.h"
 
 
 #if 0
@@ -106,11 +107,11 @@ int arm9tdmi_examine_debug_reason(target_t *target)
                        && (target->debug_reason != DBG_REASON_SINGLESTEP))
        {
                scan_field_t fields[3];
-               u8 databus[4];
-               u8 instructionbus[4];
-               u8 debug_reason;
+               uint8_t databus[4];
+               uint8_t instructionbus[4];
+               uint8_t debug_reason;
 
-               jtag_add_end_state(TAP_DRPAUSE);
+               jtag_set_end_state(TAP_DRPAUSE);
 
                fields[0].tap = arm7_9->jtag_info.tap;
                fields[0].num_bits = 32;
@@ -133,7 +134,7 @@ int arm9tdmi_examine_debug_reason(target_t *target)
                }
                arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
 
-               jtag_add_dr_scan(3, fields, TAP_DRPAUSE);
+               jtag_add_dr_scan(3, fields, jtag_set_end_state(TAP_DRPAUSE));
                if ((retval = jtag_execute_queue()) != ERROR_OK)
                {
                        return retval;
@@ -146,7 +147,7 @@ int arm9tdmi_examine_debug_reason(target_t *target)
                fields[2].in_value = NULL;
                fields[2].out_value = instructionbus;
 
-               jtag_add_dr_scan(3, fields, TAP_DRPAUSE);
+               jtag_add_dr_scan(3, fields, jtag_set_end_state(TAP_DRPAUSE));
 
                if (debug_reason & 0x4)
                        if (debug_reason & 0x2)
@@ -165,9 +166,9 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
 {
        int retval = ERROR_OK;
        scan_field_t fields[3];
-       u8 out_buf[4];
-       u8 instr_buf[4];
-       u8 sysspeed_buf = 0x0;
+       uint8_t out_buf[4];
+       uint8_t instr_buf[4];
+       uint8_t sysspeed_buf = 0x0;
 
        /* prepare buffer */
        buf_set_u32(out_buf, 0, 32, out);
@@ -177,7 +178,7 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
        if (sysspeed)
                buf_set_u32(&sysspeed_buf, 2, 1, 1);
 
-       jtag_add_end_state(TAP_DRPAUSE);
+       jtag_set_end_state(TAP_DRPAUSE);
        if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
        {
                return retval;
@@ -202,18 +203,17 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
 
        if (in)
        {
-               u8 tmp[4];
-               fields[0].in_value=tmp;
-               jtag_add_dr_scan_now(3, fields, TAP_INVALID);
+               fields[0].in_value=(uint8_t *)in;
+               jtag_add_dr_scan(3, fields, jtag_get_end_state());
 
-               *in=le_to_h_u32(tmp);
+               jtag_add_callback(arm_le_to_h_u32, (uint8_t *)in);
        }
        else
        {
-               jtag_add_dr_scan(3, fields, TAP_INVALID);
+               jtag_add_dr_scan(3, fields, jtag_get_end_state());
        }
 
-       jtag_add_runtest(0, TAP_INVALID);
+       jtag_add_runtest(0, jtag_get_end_state());
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
        {
@@ -240,7 +240,7 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
        int retval = ERROR_OK;;
        scan_field_t fields[3];
 
-       jtag_add_end_state(TAP_DRPAUSE);
+       jtag_set_end_state(TAP_DRPAUSE);
        if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
        {
                return retval;
@@ -251,8 +251,7 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
        fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
-       u8 tmp[4];
-       fields[0].in_value = tmp;
+       fields[0].in_value = (uint8_t *)in;
 
        fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 3;
@@ -264,11 +263,11 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
        fields[2].out_value = NULL;
        fields[2].in_value = NULL;
 
-       jtag_add_dr_scan_now(3, fields, TAP_INVALID);
+       jtag_add_dr_scan(3, fields, jtag_get_end_state());
 
-       *in=le_to_h_u32(tmp);
+       jtag_add_callback(arm_le_to_h_u32, (uint8_t *)in);
 
-       jtag_add_runtest(0, TAP_INVALID);
+       jtag_add_runtest(0, jtag_get_end_state());
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
        {
@@ -291,7 +290,13 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
        return ERROR_OK;
 }
 
-extern void arm_endianness(u8 *tmp, void *in, int size, int be, int flip);
+extern void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip);
+
+static int arm9endianness(uint8_t *in, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
+{
+       arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 0);
+       return ERROR_OK;
+}
 
 /* clock the target, and read the databus
  * the *in pointer points to a buffer where elements of 'size' bytes
@@ -302,7 +307,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
        int retval = ERROR_OK;
        scan_field_t fields[3];
 
-       jtag_add_end_state(TAP_DRPAUSE);
+       jtag_set_end_state(TAP_DRPAUSE);
        if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
        {
                return retval;
@@ -313,8 +318,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
        fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
-       u8 tmp[4];
-       fields[0].in_value = tmp;
+       jtag_alloc_in_value32(&fields[0]);
 
        fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 3;
@@ -326,12 +330,11 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
        fields[2].out_value = NULL;
        fields[2].in_value = NULL;
 
-       jtag_add_dr_scan_now(3, fields, TAP_INVALID);
-
-       arm_endianness(tmp, in, size, be, 0);
+       jtag_add_dr_scan(3, fields, jtag_get_end_state());
 
+       jtag_add_callback4(arm9endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
 
-       jtag_add_runtest(0, TAP_INVALID);
+       jtag_add_runtest(0, jtag_get_end_state());
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
        {
@@ -444,8 +447,8 @@ void arm9tdmi_read_core_regs_target_buffer(target_t *target, u32 mask, void* buf
        arm_jtag_t *jtag_info = &arm7_9->jtag_info;
        int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
        u32 *buf_u32 = buffer;
-       u16 *buf_u16 = buffer;
-       u8 *buf_u8 = buffer;
+       uint16_t *buf_u16 = buffer;
+       uint8_t *buf_u8 = buffer;
 
        /* STMIA r0-15, [r0] at debug speed
         * register values will start to appear on 4th DCLK
@@ -536,7 +539,7 @@ void arm9tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr)
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
 }
 
-void arm9tdmi_write_xpsr_im8(target_t *target, u8 xpsr_im, int rot, int spsr)
+void arm9tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr)
 {
        /* get pointers to arch-specific information */
        armv4_5_common_t *armv4_5 = target->arch_info;
@@ -808,7 +811,7 @@ int arm9tdmi_examine(struct target_s *target)
        int retval;
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
-       if (!target->type->examined)
+       if (!target_was_examined(target))
        {
                reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
                reg_cache_t *t;
@@ -825,7 +828,7 @@ int arm9tdmi_examine(struct target_s *target)
                        (*cache_p)->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx);
                        arm7_9->etm_ctx->reg_cache = (*cache_p)->next;
                }
-               target->type->examined = 1;
+               target_set_examined(target);
        }
        if ((retval=embeddedice_setup(target))!=ERROR_OK)
                return retval;