#include "arm9tdmi.h"
#include "target_type.h"
+#include "register.h"
+#include "arm_opcodes.h"
/*
#define _DEBUG_INSTRUCTION_EXECUTION_
#endif
-static const struct arm9tdmi_vector arm9tdmi_vectors[] =
+enum arm9tdmi_vector_bit
{
+ ARM9TDMI_RESET_VECTOR = 0x01,
+ ARM9TDMI_UNDEF_VECTOR = 0x02,
+ ARM9TDMI_SWI_VECTOR = 0x04,
+ ARM9TDMI_PABT_VECTOR = 0x08,
+ ARM9TDMI_DABT_VECTOR = 0x10,
+ /* BIT(5) reserved -- must be zero */
+ ARM9TDMI_IRQ_VECTOR = 0x40,
+ ARM9TDMI_FIQ_VECTOR = 0x80,
+};
+
+static const struct arm9tdmi_vector {
+ const char *name;
+ uint32_t value;
+} arm9tdmi_vectors[] = {
{"reset", ARM9TDMI_RESET_VECTOR},
{"undef", ARM9TDMI_UNDEF_VECTOR},
{"swi", ARM9TDMI_SWI_VECTOR},
uint8_t instructionbus[4];
uint8_t debug_reason;
- jtag_set_end_state(TAP_DRPAUSE);
-
- fields[0].tap = arm7_9->jtag_info.tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].in_value = databus;
- fields[1].tap = arm7_9->jtag_info.tap;
fields[1].num_bits = 3;
fields[1].out_value = NULL;
fields[1].in_value = &debug_reason;
- fields[2].tap = arm7_9->jtag_info.tap;
fields[2].num_bits = 32;
fields[2].out_value = NULL;
fields[2].in_value = instructionbus;
- if ((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1)) != ERROR_OK)
+ if ((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
{
return retval;
}
- arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
+ retval = arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
- jtag_add_dr_scan(3, fields, jtag_set_end_state(TAP_DRPAUSE));
+ jtag_add_dr_scan(arm7_9->jtag_info.tap, 3, fields, TAP_DRPAUSE);
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
return retval;
fields[2].in_value = NULL;
fields[2].out_value = instructionbus;
- jtag_add_dr_scan(3, fields, jtag_set_end_state(TAP_DRPAUSE));
+ jtag_add_dr_scan(arm7_9->jtag_info.tap, 3, fields, TAP_DRPAUSE);
if (debug_reason & 0x4)
if (debug_reason & 0x2)
if (sysspeed)
buf_set_u32(&sysspeed_buf, 2, 1, 1);
- jtag_set_end_state(TAP_DRPAUSE);
- if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+ if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
{
return retval;
}
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
- fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = out_buf;
fields[0].in_value = NULL;
- fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
fields[1].out_value = &sysspeed_buf;
fields[1].in_value = NULL;
- fields[2].tap = jtag_info->tap;
fields[2].num_bits = 32;
fields[2].out_value = instr_buf;
fields[2].in_value = NULL;
if (in)
{
fields[0].in_value = (uint8_t *)in;
- jtag_add_dr_scan(3, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE);
jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in);
}
else
{
- jtag_add_dr_scan(3, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE);
}
- jtag_add_runtest(0, jtag_get_end_state());
+ jtag_add_runtest(0, TAP_DRPAUSE);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
int retval = ERROR_OK;;
struct scan_field fields[3];
- jtag_set_end_state(TAP_DRPAUSE);
- if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+ if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
{
return retval;
}
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
- fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].in_value = (uint8_t *)in;
- fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
fields[1].out_value = NULL;
fields[1].in_value = NULL;
- fields[2].tap = jtag_info->tap;
fields[2].num_bits = 32;
fields[2].out_value = NULL;
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE);
jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in);
- jtag_add_runtest(0, jtag_get_end_state());
+ jtag_add_runtest(0, TAP_DRPAUSE);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
return ERROR_OK;
}
-extern void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip);
-
static int arm9endianness(jtag_callback_data_t arg,
jtag_callback_data_t size, jtag_callback_data_t be,
jtag_callback_data_t captured)
int retval = ERROR_OK;
struct scan_field fields[3];
- jtag_set_end_state(TAP_DRPAUSE);
- if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+ if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
{
return retval;
}
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
- fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
- jtag_alloc_in_value32(&fields[0]);
+ fields[0].in_value = in;
- fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
fields[1].out_value = NULL;
fields[1].in_value = NULL;
- fields[2].tap = jtag_info->tap;
fields[2].num_bits = 32;
fields[2].out_value = NULL;
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE);
- jtag_add_callback4(arm9endianness, (jtag_callback_data_t)in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
+ jtag_add_callback4(arm9endianness,
+ (jtag_callback_data_t)in,
+ (jtag_callback_data_t)size,
+ (jtag_callback_data_t)be,
+ (jtag_callback_data_t)in);
- jtag_add_runtest(0, jtag_get_end_state());
+ jtag_add_runtest(0, TAP_DRPAUSE);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
LOG_DEBUG("-");
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
+ struct arm *arm = &arm7_9->arm;
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
/* fetch NOP, LDM in EXECUTE stage (1st cycle) */
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
/* nothing fetched, LDM in EXECUTE stage (2nd cycle) */
- arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) | 1, NULL, 0);
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP,
+ buf_get_u32(arm->pc->value, 0, 32) | 1, NULL, 0);
/* nothing fetched, LDM in EXECUTE stage (3rd cycle) */
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
/* fetch NOP, LDR in Execute */
arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, 0, NULL, 0);
/* nothing fetched, LDR in EXECUTE stage (2nd cycle) */
- arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, buf_get_u32(armv4_5->core_cache->reg_list[0].value, 0, 32), NULL, 0);
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP,
+ buf_get_u32(arm->core_cache->reg_list[0].value, 0, 32), NULL, 0);
/* nothing fetched, LDR in EXECUTE stage (3rd cycle) */
arm9tdmi_clock_out(jtag_info, ARMV4_5_T_NOP, 0, NULL, 0);
static void arm9tdmi_build_reg_cache(struct target *target)
{
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
- struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
+ struct arm *arm = target_to_arm(target);
- (*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
- armv4_5->core_cache = (*cache_p);
+ (*cache_p) = arm_build_reg_cache(target, arm);
}
int arm9tdmi_init_target(struct command_context *cmd_ctx,
return ERROR_OK;
}
-int arm9tdmi_init_arch_info(struct target *target, struct arm9tdmi_common *arm9tdmi, struct jtag_tap *tap)
+int arm9tdmi_init_arch_info(struct target *target,
+ struct arm7_9_common *arm7_9, struct jtag_tap *tap)
{
- struct arm *armv4_5;
- struct arm7_9_common *arm7_9;
-
- arm7_9 = &arm9tdmi->arm7_9_common;
- armv4_5 = &arm7_9->armv4_5_common;
-
/* prepare JTAG information for the new target */
arm7_9->jtag_info.tap = tap;
arm7_9->jtag_info.scann_size = 5;
arm7_9->post_debug_entry = NULL;
arm7_9->pre_restore_context = NULL;
- arm7_9->post_restore_context = NULL;
/* initialize arch-specific breakpoint handling */
arm7_9->arm_bkpt = 0xdeeedeee;
static int arm9tdmi_target_create(struct target *target, Jim_Interp *interp)
{
- struct arm9tdmi_common *arm9tdmi = calloc(1,sizeof(struct arm9tdmi_common));
+ struct arm7_9_common *arm7_9 = calloc(1,sizeof(struct arm7_9_common));
- arm9tdmi_init_arch_info(target, arm9tdmi, target->tap);
- arm9tdmi->arm7_9_common.armv4_5_common.is_armv4 = true;
+ arm9tdmi_init_arch_info(target, arm7_9, target->tap);
+ arm7_9->arm.is_armv4 = true;
return ERROR_OK;
}
COMMAND_HANDLER(handle_arm9tdmi_catch_vectors_command)
{
- struct target *target = get_current_target(cmd_ctx);
+ struct target *target = get_current_target(CMD_CTX);
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct reg *vector_catch;
uint32_t vector_catch_value;
+ if (!target_was_examined(target))
+ {
+ LOG_ERROR("Target not examined yet");
+ return ERROR_FAIL;
+ }
+
/* it's uncommon, but some ARM7 chips can support this */
if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC
|| !arm7_9->has_vector_catch) {
- command_print(cmd_ctx, "target doesn't have EmbeddedICE "
+ command_print(CMD_CTX, "target doesn't have EmbeddedICE "
"with vector_catch");
return ERROR_TARGET_INVALID;
}
/* get the current setting */
vector_catch_value = buf_get_u32(vector_catch->value, 0, 8);
- if (argc > 0)
+ if (CMD_ARGC > 0)
{
vector_catch_value = 0x0;
- if (strcmp(args[0], "all") == 0)
+ if (strcmp(CMD_ARGV[0], "all") == 0)
{
vector_catch_value = 0xdf;
}
- else if (strcmp(args[0], "none") == 0)
+ else if (strcmp(CMD_ARGV[0], "none") == 0)
{
/* do nothing */
}
else
{
- for (unsigned i = 0; i < argc; i++)
+ for (unsigned i = 0; i < CMD_ARGC; i++)
{
/* go through list of vectors */
unsigned j;
for (j = 0; arm9tdmi_vectors[j].name; j++)
{
- if (strcmp(args[i], arm9tdmi_vectors[j].name) == 0)
+ if (strcmp(CMD_ARGV[i], arm9tdmi_vectors[j].name) == 0)
{
vector_catch_value |= arm9tdmi_vectors[j].value;
break;
/* complain if vector wasn't found */
if (!arm9tdmi_vectors[j].name)
{
- command_print(cmd_ctx, "vector '%s' not found, leaving current setting unchanged", args[i]);
+ command_print(CMD_CTX, "vector '%s' not found, leaving current setting unchanged", CMD_ARGV[i]);
/* reread current setting */
vector_catch_value = buf_get_u32(
/* output current settings */
for (unsigned i = 0; arm9tdmi_vectors[i].name; i++) {
- command_print(cmd_ctx, "%s: %s", arm9tdmi_vectors[i].name,
+ command_print(CMD_CTX, "%s: %s", arm9tdmi_vectors[i].name,
(vector_catch_value & arm9tdmi_vectors[i].value)
? "catch" : "don't catch");
}
return ERROR_OK;
}
-int arm9tdmi_register_commands(struct command_context *cmd_ctx)
-{
- int retval;
- struct command *arm9tdmi_cmd;
-
- retval = arm7_9_register_commands(cmd_ctx);
- arm9tdmi_cmd = register_command(cmd_ctx, NULL, "arm9",
- NULL, COMMAND_ANY,
- "arm9 specific commands");
- register_command(cmd_ctx, arm9tdmi_cmd, "vector_catch",
- handle_arm9tdmi_catch_vectors_command, COMMAND_EXEC,
- "arm9 vector_catch [all|none|reset|undef|swi|pabt|dabt|irq|fiq] ...");
-
- return retval;
-}
+static const struct command_registration arm9tdmi_exec_command_handlers[] = {
+ {
+ .name = "vector_catch",
+ .handler = handle_arm9tdmi_catch_vectors_command,
+ .mode = COMMAND_EXEC,
+ .help = "Display, after optionally updating, configuration "
+ "of vector catch unit.",
+ .usage = "[all|none|(reset|undef|swi|pabt|dabt|irq|fiq)*]",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+const struct command_registration arm9tdmi_command_handlers[] = {
+ {
+ .chain = arm7_9_command_handlers,
+ },
+ {
+ .name = "arm9",
+ .mode = COMMAND_ANY,
+ .help = "arm9 command group",
+ .usage = "",
+ .chain = arm9tdmi_exec_command_handlers,
+ },
+ COMMAND_REGISTRATION_DONE
+};
/** Holds methods for ARM9TDMI targets. */
struct target_type arm9tdmi_target =
.name = "arm9tdmi",
.poll = arm7_9_poll,
- .arch_state = armv4_5_arch_state,
+ .arch_state = arm_arch_state,
.target_request_data = arm7_9_target_request_data,
.deassert_reset = arm7_9_deassert_reset,
.soft_reset_halt = arm7_9_soft_reset_halt,
- .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+ .get_gdb_reg_list = arm_get_gdb_reg_list,
.read_memory = arm7_9_read_memory,
.write_memory = arm7_9_write_memory,
.bulk_write_memory = arm7_9_bulk_write_memory,
- .checksum_memory = arm7_9_checksum_memory,
- .blank_check_memory = arm7_9_blank_check_memory,
+
+ .checksum_memory = arm_checksum_memory,
+ .blank_check_memory = arm_blank_check_memory,
.run_algorithm = armv4_5_run_algorithm,
.add_watchpoint = arm7_9_add_watchpoint,
.remove_watchpoint = arm7_9_remove_watchpoint,
- .register_commands = arm9tdmi_register_commands,
+ .commands = arm9tdmi_command_handlers,
.target_create = arm9tdmi_target_create,
.init_target = arm9tdmi_init_target,
.examine = arm7_9_examine,
+ .check_reset = arm7_9_check_reset,
};
projects / fw / openocd / blobdiff