fix comment w.r.t. start address for RAM
[fw/openocd] / src / target / arm9tdmi.c
index 0df6a14b15e3de046573e0e0b7e33cfd6a213bf7..0c242fad7f6ec93209ff842b571df530eaecabe3 100644 (file)
@@ -48,7 +48,7 @@ int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, cha
 /* forward declarations */
 int arm9tdmi_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
 int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int arm9tdmi_quit();
+int arm9tdmi_quit(void);
                
 target_type_t arm9tdmi_target =
 {
@@ -73,6 +73,7 @@ target_type_t arm9tdmi_target =
        .write_memory = arm7_9_write_memory,
        .bulk_write_memory = arm7_9_bulk_write_memory,
        .checksum_memory = arm7_9_checksum_memory,
+       .blank_check_memory = arm7_9_blank_check_memory,
        
        .run_algorithm = armv4_5_run_algorithm,
        
@@ -380,7 +381,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
                        
                if (in)
                {
-                       LOG_DEBUG("in: 0x%8.8x", *in);
+                       LOG_DEBUG("in: 0x%8.8x", *(u32*)in);
                }
                else
                {
@@ -843,26 +844,46 @@ void arm9tdmi_build_reg_cache(target_t *target)
        reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
        /* get pointers to arch-specific information */
        armv4_5_common_t *armv4_5 = target->arch_info;
-       arm7_9_common_t *arm7_9 = armv4_5->arch_info;
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
 
        (*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
        armv4_5->core_cache = (*cache_p);
-       
-       /* one extra register (vector catch) */
-       (*cache_p)->next = embeddedice_build_reg_cache(target, arm7_9);
-       arm7_9->eice_cache = (*cache_p)->next;
+}
 
+
+int arm9tdmi_examine(struct target_s *target)
+{
+       /* get pointers to arch-specific information */
+       int retval;
+       armv4_5_common_t *armv4_5 = target->arch_info;
+       arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+       if (!target->type->examined)
+       {
+               reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
+               reg_cache_t *t;
+               /* one extra register (vector catch) */
+               t=embeddedice_build_reg_cache(target, arm7_9);
+               if (t==NULL)
+                       return ERROR_FAIL;
+               (*cache_p) = t;
+               arm7_9->eice_cache = (*cache_p);
+       
+               if (arm7_9->etm_ctx)
+               {
+                       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+                       (*cache_p)->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx);
+                       arm7_9->etm_ctx->reg_cache = (*cache_p)->next;
+               }
+               target->type->examined = 1;
+       }
+       if ((retval=embeddedice_setup(target))!=ERROR_OK)
+               return retval;
+       if ((retval=arm7_9_setup(target))!=ERROR_OK)
+               return retval;
        if (arm7_9->etm_ctx)
        {
-               (*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx);
-               arm7_9->etm_ctx->reg_cache = (*cache_p)->next->next;
+               if ((retval=etm_setup(target))!=ERROR_OK)
+                       return retval;
        }
-}
-
-int arm9tdmi_examine(struct command_context_s *cmd_ctx, struct target_s *target)
-{
-       target->type->examined = 1;
        return ERROR_OK;
 }
 
@@ -875,7 +896,7 @@ int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *tar
        
 }
 
-int arm9tdmi_quit()
+int arm9tdmi_quit(void)
 {
        
        return ERROR_OK;
@@ -929,8 +950,6 @@ int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, int c
        arm7_9->arm_bkpt = 0xdeeedeee;
        arm7_9->thumb_bkpt = 0xdeee;
        
-       arm7_9->sw_bkpts_use_wp = 1;
-       arm7_9->sw_bkpts_enabled = 0;
        arm7_9->dbgreq_adjust_pc = 3;
        arm7_9->arch_info = arm9tdmi;