-/***************************************************************************\r
- * Copyright (C) 2005 by Dominic Rath *\r
- * Dominic.Rath@gmx.de *\r
- * *\r
- * This program is free software; you can redistribute it and/or modify *\r
- * it under the terms of the GNU General Public License as published by *\r
- * the Free Software Foundation; either version 2 of the License, or *\r
- * (at your option) any later version. *\r
- * *\r
- * This program is distributed in the hope that it will be useful, *\r
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *\r
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *\r
- * GNU General Public License for more details. *\r
- * *\r
- * You should have received a copy of the GNU General Public License *\r
- * along with this program; if not, write to the *\r
- * Free Software Foundation, Inc., *\r
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *\r
- ***************************************************************************/\r
-#ifdef HAVE_CONFIG_H\r
-#include "config.h"\r
-#endif\r
-\r
-#include "arm966e.h"\r
-\r
-#include "arm7_9_common.h"\r
-#include "register.h"\r
-#include "target.h"\r
-#include "armv4_5.h"\r
-#include "embeddedice.h"\r
-#include "log.h"\r
-#include "jtag.h"\r
-#include "arm_jtag.h"\r
-\r
-#include <stdlib.h>\r
-#include <string.h>\r
-\r
-#if 0\r
-#define _DEBUG_INSTRUCTION_EXECUTION_\r
-#endif\r
-\r
-/* cli handling */\r
-int arm966e_register_commands(struct command_context_s *cmd_ctx);\r
-\r
-/* forward declarations */\r
-int arm966e_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);\r
-int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target);\r
-int arm966e_quit(void);\r
-\r
-target_type_t arm966e_target =\r
-{\r
- .name = "arm966e",\r
-\r
- .poll = arm7_9_poll,\r
- .arch_state = armv4_5_arch_state,\r
-\r
- .target_request_data = arm7_9_target_request_data,\r
-\r
- .halt = arm7_9_halt,\r
- .resume = arm7_9_resume,\r
- .step = arm7_9_step,\r
-\r
- .assert_reset = arm7_9_assert_reset,\r
- .deassert_reset = arm7_9_deassert_reset,\r
- .soft_reset_halt = arm7_9_soft_reset_halt,\r
- .prepare_reset_halt = arm7_9_prepare_reset_halt,\r
-\r
- .get_gdb_reg_list = armv4_5_get_gdb_reg_list,\r
-\r
- .read_memory = arm7_9_read_memory,\r
- .write_memory = arm7_9_write_memory,\r
- .bulk_write_memory = arm7_9_bulk_write_memory,\r
- .checksum_memory = arm7_9_checksum_memory,\r
- \r
- .run_algorithm = armv4_5_run_algorithm,\r
- \r
- .add_breakpoint = arm7_9_add_breakpoint,\r
- .remove_breakpoint = arm7_9_remove_breakpoint,\r
- .add_watchpoint = arm7_9_add_watchpoint,\r
- .remove_watchpoint = arm7_9_remove_watchpoint,\r
-\r
- .register_commands = arm966e_register_commands,\r
- .target_command = arm966e_target_command,\r
- .init_target = arm966e_init_target,\r
- .quit = arm966e_quit,\r
-};\r
-\r
-int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target)\r
-{\r
- arm9tdmi_init_target(cmd_ctx, target);\r
- \r
- return ERROR_OK;\r
-}\r
-\r
-int arm966e_quit(void)\r
-{\r
- \r
- return ERROR_OK;\r
-}\r
-\r
-int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, int chain_pos, char *variant)\r
-{\r
- arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common;\r
- arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;\r
- \r
- arm9tdmi_init_arch_info(target, arm9tdmi, chain_pos, variant);\r
-\r
- arm9tdmi->arch_info = arm966e;\r
- arm966e->common_magic = ARM966E_COMMON_MAGIC;\r
- \r
- /* The ARM966E-S implements the ARMv5TE architecture which\r
- * has the BKPT instruction, so we don't have to use a watchpoint comparator\r
- */\r
- arm7_9->arm_bkpt = ARMV5_BKPT(0x0);\r
- arm7_9->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff;\r
- \r
- arm7_9->sw_bkpts_use_wp = 0;\r
- arm7_9->sw_bkpts_enabled = 1;\r
- \r
- return ERROR_OK;\r
-}\r
-\r
-int arm966e_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target)\r
-{\r
- int chain_pos;\r
- char *variant = NULL;\r
- arm966e_common_t *arm966e = malloc(sizeof(arm966e_common_t));\r
- \r
- if (argc < 4)\r
- {\r
- ERROR("'target arm966e' requires at least one additional argument");\r
- exit(-1);\r
- }\r
- \r
- chain_pos = strtoul(args[3], NULL, 0);\r
- \r
- if (argc >= 5)\r
- variant = args[4];\r
- \r
- DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);\r
- \r
- arm966e_init_arch_info(target, arm966e, chain_pos, variant);\r
-\r
- return ERROR_OK;\r
-}\r
-\r
-int arm966e_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm9tdmi_common_t **arm9tdmi_p, arm966e_common_t **arm966e_p)\r
-{\r
- armv4_5_common_t *armv4_5 = target->arch_info;\r
- arm7_9_common_t *arm7_9;\r
- arm9tdmi_common_t *arm9tdmi;\r
- arm966e_common_t *arm966e;\r
- \r
- if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)\r
- {\r
- return -1;\r
- }\r
- \r
- arm7_9 = armv4_5->arch_info;\r
- if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC)\r
- {\r
- return -1;\r
- }\r
- \r
- arm9tdmi = arm7_9->arch_info;\r
- if (arm9tdmi->common_magic != ARM9TDMI_COMMON_MAGIC)\r
- {\r
- return -1;\r
- }\r
- \r
- arm966e = arm9tdmi->arch_info;\r
- if (arm966e->common_magic != ARM966E_COMMON_MAGIC)\r
- {\r
- return -1;\r
- }\r
- \r
- *armv4_5_p = armv4_5;\r
- *arm7_9_p = arm7_9;\r
- *arm9tdmi_p = arm9tdmi;\r
- *arm966e_p = arm966e;\r
- \r
- return ERROR_OK;\r
-}\r
-\r
-int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)\r
-{\r
- armv4_5_common_t *armv4_5 = target->arch_info;\r
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;\r
- arm_jtag_t *jtag_info = &arm7_9->jtag_info;\r
- scan_field_t fields[3];\r
- u8 reg_addr_buf = reg_addr & 0x3f;\r
- u8 nr_w_buf = 0;\r
- \r
- jtag_add_end_state(TAP_RTI);\r
- arm_jtag_scann(jtag_info, 0xf);\r
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);\r
-\r
- fields[0].device = jtag_info->chain_pos;\r
- fields[0].num_bits = 32;\r
- fields[0].out_value = NULL;\r
- fields[0].out_mask = NULL;\r
- fields[0].in_value = NULL;\r
- fields[0].in_check_value = NULL;\r
- fields[0].in_check_mask = NULL;\r
- fields[0].in_handler = NULL;\r
- fields[0].in_handler_priv = NULL;\r
-\r
- fields[1].device = jtag_info->chain_pos;\r
- fields[1].num_bits = 6;\r
- fields[1].out_value = ®_addr_buf;\r
- fields[1].out_mask = NULL;\r
- fields[1].in_value = NULL;\r
- fields[1].in_check_value = NULL;\r
- fields[1].in_check_mask = NULL;\r
- fields[1].in_handler = NULL;\r
- fields[1].in_handler_priv = NULL;\r
-\r
- fields[2].device = jtag_info->chain_pos;\r
- fields[2].num_bits = 1;\r
- fields[2].out_value = &nr_w_buf;\r
- fields[2].out_mask = NULL;\r
- fields[2].in_value = NULL;\r
- fields[2].in_check_value = NULL;\r
- fields[2].in_check_mask = NULL;\r
- fields[2].in_handler = NULL;\r
- fields[2].in_handler_priv = NULL;\r
- \r
- jtag_add_dr_scan(3, fields, -1);\r
-\r
- fields[0].in_handler_priv = value;\r
- fields[0].in_handler = arm_jtag_buf_to_u32;\r
-\r
- jtag_add_dr_scan(3, fields, -1);\r
-\r
-#ifdef _DEBUG_INSTRUCTION_EXECUTION_\r
- jtag_execute_queue();\r
- DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);\r
-#endif\r
-\r
- return ERROR_OK;\r
-}\r
-\r
-int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)\r
-{\r
- armv4_5_common_t *armv4_5 = target->arch_info;\r
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;\r
- arm_jtag_t *jtag_info = &arm7_9->jtag_info;\r
- scan_field_t fields[3];\r
- u8 reg_addr_buf = reg_addr & 0x3f;\r
- u8 nr_w_buf = 1;\r
- u8 value_buf[4];\r
- \r
- buf_set_u32(value_buf, 0, 32, value);\r
- \r
- jtag_add_end_state(TAP_RTI);\r
- arm_jtag_scann(jtag_info, 0xf);\r
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);\r
-\r
- fields[0].device = jtag_info->chain_pos;\r
- fields[0].num_bits = 32;\r
- fields[0].out_value = value_buf;\r
- fields[0].out_mask = NULL;\r
- fields[0].in_value = NULL;\r
- fields[0].in_check_value = NULL;\r
- fields[0].in_check_mask = NULL;\r
- fields[0].in_handler = NULL;\r
- fields[0].in_handler_priv = NULL;\r
-\r
- fields[1].device = jtag_info->chain_pos;\r
- fields[1].num_bits = 6;\r
- fields[1].out_value = ®_addr_buf;\r
- fields[1].out_mask = NULL;\r
- fields[1].in_value = NULL;\r
- fields[1].in_check_value = NULL;\r
- fields[1].in_check_mask = NULL;\r
- fields[1].in_handler = NULL;\r
- fields[1].in_handler_priv = NULL;\r
-\r
- fields[2].device = jtag_info->chain_pos;\r
- fields[2].num_bits = 1;\r
- fields[2].out_value = &nr_w_buf;\r
- fields[2].out_mask = NULL;\r
- fields[2].in_value = NULL;\r
- fields[2].in_check_value = NULL;\r
- fields[2].in_check_mask = NULL;\r
- fields[2].in_handler = NULL;\r
- fields[2].in_handler_priv = NULL;\r
- \r
- jtag_add_dr_scan(3, fields, -1);\r
-\r
-#ifdef _DEBUG_INSTRUCTION_EXECUTION_\r
- DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);\r
-#endif\r
-\r
- return ERROR_OK;\r
-}\r
-\r
-int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)\r
-{\r
- int retval;\r
- target_t *target = get_current_target(cmd_ctx);\r
- armv4_5_common_t *armv4_5;\r
- arm7_9_common_t *arm7_9;\r
- arm9tdmi_common_t *arm9tdmi;\r
- arm966e_common_t *arm966e;\r
- arm_jtag_t *jtag_info;\r
-\r
- if (arm966e_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm966e) != ERROR_OK)\r
- {\r
- command_print(cmd_ctx, "current target isn't an ARM966e target");\r
- return ERROR_OK;\r
- }\r
- \r
- jtag_info = &arm7_9->jtag_info;\r
- \r
- if (target->state != TARGET_HALTED)\r
- {\r
- command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);\r
- return ERROR_OK;\r
- }\r
-\r
- /* one or more argument, access a single register (write if second argument is given */\r
- if (argc >= 1)\r
- {\r
- int address = strtoul(args[0], NULL, 0);\r
-\r
- if (argc == 1)\r
- {\r
- u32 value;\r
- if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK)\r
- {\r
- command_print(cmd_ctx, "couldn't access reg %i", address);\r
- return ERROR_OK;\r
- }\r
- jtag_execute_queue();\r
- \r
- command_print(cmd_ctx, "%i: %8.8x", address, value);\r
- }\r
- else if (argc == 2)\r
- {\r
- u32 value = strtoul(args[1], NULL, 0);\r
- if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK)\r
- {\r
- command_print(cmd_ctx, "couldn't access reg %i", address);\r
- return ERROR_OK;\r
- }\r
- command_print(cmd_ctx, "%i: %8.8x", address, value);\r
- }\r
- }\r
-\r
- return ERROR_OK;\r
-}\r
-\r
-int arm966e_register_commands(struct command_context_s *cmd_ctx)\r
-{\r
- int retval;\r
- command_t *arm966e_cmd;\r
- \r
- retval = arm9tdmi_register_commands(cmd_ctx);\r
- arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e", NULL, COMMAND_ANY, "arm966e specific commands");\r
- register_command(cmd_ctx, arm966e_cmd, "cp15", arm966e_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register <num> [value]");\r
- \r
- return ERROR_OK;\r
-}\r
+/***************************************************************************
+ * Copyright (C) 2005 by Dominic Rath *
+ * Dominic.Rath@gmx.de *
+ * *
+ * Copyright (C) 2008 by Spencer Oliver *
+ * spen@spen-soft.co.uk *
+ * *
+ * This program is free software; you can redistribute it and/or modify *
+ * it under the terms of the GNU General Public License as published by *
+ * the Free Software Foundation; either version 2 of the License, or *
+ * (at your option) any later version. *
+ * *
+ * This program is distributed in the hope that it will be useful, *
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of *
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
+ * GNU General Public License for more details. *
+ * *
+ * You should have received a copy of the GNU General Public License *
+ * along with this program; if not, write to the *
+ * Free Software Foundation, Inc., *
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ ***************************************************************************/
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "arm966e.h"
+#include "target_type.h"
+#include "arm_opcodes.h"
+
+#if 0
+#define _DEBUG_INSTRUCTION_EXECUTION_
+#endif
+
+int arm966e_init_arch_info(struct target *target, struct arm966e_common *arm966e, struct jtag_tap *tap)
+{
+ struct arm7_9_common *arm7_9 = &arm966e->arm7_9_common;
+
+ /* initialize arm7/arm9 specific info (including armv4_5) */
+ arm9tdmi_init_arch_info(target, arm7_9, tap);
+
+ arm966e->common_magic = ARM966E_COMMON_MAGIC;
+
+ /* The ARM966E-S implements the ARMv5TE architecture which
+ * has the BKPT instruction, so we don't have to use a watchpoint comparator
+ */
+ arm7_9->arm_bkpt = ARMV5_BKPT(0x0);
+ arm7_9->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff;
+
+ return ERROR_OK;
+}
+
+static int arm966e_target_create(struct target *target, Jim_Interp *interp)
+{
+ struct arm966e_common *arm966e = calloc(1, sizeof(struct arm966e_common));
+
+ return arm966e_init_arch_info(target, arm966e, target->tap);
+}
+
+static int arm966e_verify_pointer(struct command_context *cmd_ctx,
+ struct arm966e_common *arm966e)
+{
+ if (arm966e->common_magic != ARM966E_COMMON_MAGIC) {
+ command_print(cmd_ctx, "target is not an ARM966");
+ return ERROR_TARGET_INVALID;
+ }
+ return ERROR_OK;
+}
+
+/*
+ * REVISIT: The "read_cp15" and "write_cp15" commands could hook up
+ * to eventual mrc() and mcr() routines ... the reg_addr values being
+ * constructed (for CP15 only) from Opcode_1, Opcode_2, and CRn values.
+ * See section 7.3 of the ARM966E-S TRM.
+ */
+
+static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *value)
+{
+ int retval = ERROR_OK;
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+ struct arm_jtag *jtag_info = &arm7_9->jtag_info;
+ struct scan_field fields[3];
+ uint8_t reg_addr_buf = reg_addr & 0x3f;
+ uint8_t nr_w_buf = 0;
+
+ retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+
+ fields[0].num_bits = 32;
+ /* REVISIT: table 7-2 shows that bits 31-31 need to be
+ * specified for accessing BIST registers ...
+ */
+ fields[0].out_value = NULL;
+ fields[0].in_value = NULL;
+
+ fields[1].num_bits = 6;
+ fields[1].out_value = ®_addr_buf;
+ fields[1].in_value = NULL;
+
+ fields[2].num_bits = 1;
+ fields[2].out_value = &nr_w_buf;
+ fields[2].in_value = NULL;
+
+ jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
+
+ fields[1].in_value = (uint8_t *)value;
+
+ jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
+
+ jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
+
+
+#ifdef _DEBUG_INSTRUCTION_EXECUTION_
+ retval = jtag_execute_queue();
+ if (retval != ERROR_OK)
+ return retval;
+ LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
+#endif
+
+ return ERROR_OK;
+}
+
+/* EXPORTED to str9x (flash) */
+int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value)
+{
+ int retval = ERROR_OK;
+ struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
+ struct arm_jtag *jtag_info = &arm7_9->jtag_info;
+ struct scan_field fields[3];
+ uint8_t reg_addr_buf = reg_addr & 0x3f;
+ uint8_t nr_w_buf = 1;
+ uint8_t value_buf[4];
+
+ buf_set_u32(value_buf, 0, 32, value);
+
+ retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ if (retval != ERROR_OK)
+ return retval;
+
+ fields[0].num_bits = 32;
+ fields[0].out_value = value_buf;
+ fields[0].in_value = NULL;
+
+ fields[1].num_bits = 6;
+ fields[1].out_value = ®_addr_buf;
+ fields[1].in_value = NULL;
+
+ fields[2].num_bits = 1;
+ fields[2].out_value = &nr_w_buf;
+ fields[2].in_value = NULL;
+
+ jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
+
+#ifdef _DEBUG_INSTRUCTION_EXECUTION_
+ LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
+#endif
+
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(arm966e_handle_cp15_command)
+{
+ int retval;
+ struct target *target = get_current_target(CMD_CTX);
+ struct arm966e_common *arm966e = target_to_arm966(target);
+
+ retval = arm966e_verify_pointer(CMD_CTX, arm966e);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if (target->state != TARGET_HALTED) {
+ command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
+ return ERROR_OK;
+ }
+
+ /* one or more argument, access a single register (write if second argument is given */
+ if (CMD_ARGC >= 1) {
+ uint32_t address;
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
+
+ if (CMD_ARGC == 1) {
+ uint32_t value;
+ retval = arm966e_read_cp15(target, address, &value);
+ if (retval != ERROR_OK) {
+ command_print(CMD_CTX,
+ "couldn't access reg %" PRIi32,
+ address);
+ return ERROR_OK;
+ }
+ retval = jtag_execute_queue();
+ if (retval != ERROR_OK)
+ return retval;
+
+ command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32,
+ address, value);
+ } else if (CMD_ARGC == 2) {
+ uint32_t value;
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
+ retval = arm966e_write_cp15(target, address, value);
+ if (retval != ERROR_OK) {
+ command_print(CMD_CTX,
+ "couldn't access reg %" PRIi32,
+ address);
+ return ERROR_OK;
+ }
+ command_print(CMD_CTX, "%" PRIi32 ": %8.8" PRIx32,
+ address, value);
+ }
+ }
+
+ return ERROR_OK;
+}
+
+static const struct command_registration arm966e_exec_command_handlers[] = {
+ {
+ .name = "cp15",
+ .handler = arm966e_handle_cp15_command,
+ .mode = COMMAND_EXEC,
+ .usage = "regnum [value]",
+ .help = "display/modify cp15 register",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+const struct command_registration arm966e_command_handlers[] = {
+ {
+ .chain = arm9tdmi_command_handlers,
+ },
+ {
+ .name = "arm966e",
+ .mode = COMMAND_ANY,
+ .help = "arm966e command group",
+ .usage = "",
+ .chain = arm966e_exec_command_handlers,
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+/** Holds methods for ARM966 targets. */
+struct target_type arm966e_target = {
+ .name = "arm966e",
+
+ .poll = arm7_9_poll,
+ .arch_state = arm_arch_state,
+
+ .target_request_data = arm7_9_target_request_data,
+
+ .halt = arm7_9_halt,
+ .resume = arm7_9_resume,
+ .step = arm7_9_step,
+
+ .assert_reset = arm7_9_assert_reset,
+ .deassert_reset = arm7_9_deassert_reset,
+ .soft_reset_halt = arm7_9_soft_reset_halt,
+
+ .get_gdb_reg_list = arm_get_gdb_reg_list,
+
+ .read_memory = arm7_9_read_memory,
+ .write_memory = arm7_9_write_memory,
+ .bulk_write_memory = arm7_9_bulk_write_memory,
+
+ .checksum_memory = arm_checksum_memory,
+ .blank_check_memory = arm_blank_check_memory,
+
+ .run_algorithm = armv4_5_run_algorithm,
+
+ .add_breakpoint = arm7_9_add_breakpoint,
+ .remove_breakpoint = arm7_9_remove_breakpoint,
+ .add_watchpoint = arm7_9_add_watchpoint,
+ .remove_watchpoint = arm7_9_remove_watchpoint,
+
+ .commands = arm966e_command_handlers,
+ .target_create = arm966e_target_create,
+ .init_target = arm9tdmi_init_target,
+ .examine = arm7_9_examine,
+ .check_reset = arm7_9_check_reset,
+};