command: print BUG warning when usage is missing

[fw/openocd] / src / target / arm946e.c

diff --git a/src/target/arm946e.c b/src/target/arm946e.c
index b9b9cef768d712d8b1fd9d646722462bd29639a1..d9d953d1511f406ad7737dc14f4afc1b6483fd11 100644 (file)
--- a/src/target/arm946e.c
+++ b/src/target/arm946e.c
@@ -246,7 +246,7 @@ uint32_t arm946e_invalidate_whole_dcache(struct target *target)
                        retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
                        if (retval != ERROR_OK)
                        {
-                               LOG_DEBUG("ERROR writing index\n");
+                               LOG_DEBUG("ERROR writing index");
                                return retval;
                        }
 
@@ -261,7 +261,7 @@ uint32_t arm946e_invalidate_whole_dcache(struct target *target)
                        retval = arm946e_write_cp15(target, 0x35, 0x1);
                        if (retval != ERROR_OK)
                        {
-                               LOG_DEBUG("ERROR cleaning cache line\n");
+                               LOG_DEBUG("ERROR cleaning cache line");
                                return retval;
                        }
 
@@ -269,7 +269,7 @@ uint32_t arm946e_invalidate_whole_dcache(struct target *target)
                        retval = arm946e_write_cp15(target, 0x1a, 0x1);
                        if (retval != ERROR_OK)
                        {
-                               LOG_DEBUG("ERROR flushing cache line\n");
+                               LOG_DEBUG("ERROR flushing cache line");
                                return retval;
                        }
                }
@@ -291,7 +291,7 @@ uint32_t arm946e_invalidate_whole_icache(struct target *target)
        retval = arm946e_write_cp15(target, 0x0f, 0x1);
        if (retval != ERROR_OK)
        {
-               LOG_DEBUG("ERROR flushing I$\n");
+               LOG_DEBUG("ERROR flushing I$");
                return retval;
        }
 
@@ -371,7 +371,7 @@ void arm946e_pre_restore_context(struct target *target)
                retval = arm946e_write_cp15(target, 0x02, ctr_reg);
                if (retval != ERROR_OK)
                {
-                       LOG_DEBUG("ERROR enabling cache\n");
+                       LOG_DEBUG("ERROR enabling cache");
                }
        } /* if preserve_cache */
 }
@@ -383,7 +383,6 @@ uint32_t arm946e_invalidate_dcache(struct target *target, uint32_t address,
        uint32_t shift = 0;
        uint32_t cur_addr = 0x0;
        uint32_t cp15_idx, set, way, dtag;
-       int nb_idx;
        uint32_t i = 0;
        int retval;
 
@@ -403,7 +402,6 @@ uint32_t arm946e_invalidate_dcache(struct target *target, uint32_t address,
                        shift = csize - 0x3; /* Now 0 = 4KB, 1 = 8KB, ... */
 
                csize = 1 << (12 + shift);
-               nb_idx = (csize / 32);
 
                set = (cur_addr >> 5) & 0xff;   /* set field is 8 bits long */
 
@@ -421,7 +419,7 @@ uint32_t arm946e_invalidate_dcache(struct target *target, uint32_t address,
                        retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
                        if (retval != ERROR_OK)
                        {
-                               LOG_DEBUG("ERROR writing index\n");
+                               LOG_DEBUG("ERROR writing index");
                                return retval;
                        }
 
@@ -439,7 +437,7 @@ uint32_t arm946e_invalidate_dcache(struct target *target, uint32_t address,
                                retval = arm946e_write_cp15(target, 0x35, 0x1);
                                if (retval != ERROR_OK)
                                {
-                                       LOG_DEBUG("ERROR cleaning cache line\n");
+                                       LOG_DEBUG("ERROR cleaning cache line");
                                        return retval;
                                }
 
@@ -447,7 +445,7 @@ uint32_t arm946e_invalidate_dcache(struct target *target, uint32_t address,
                                retval = arm946e_write_cp15(target, 0x1c, 0x1);
                                if (retval != ERROR_OK)
                                {
-                                       LOG_DEBUG("ERROR flushing cache line\n");
+                                       LOG_DEBUG("ERROR flushing cache line");
                                        return retval;
                                }
 
@@ -480,7 +478,7 @@ uint32_t arm946e_invalidate_icache(struct target *target, uint32_t address,
                        retval = arm946e_write_cp15(target, 0x3a, cp15_idx);
                        if (retval != ERROR_OK)
                        {
-                               LOG_DEBUG("ERROR writing index\n");
+                               LOG_DEBUG("ERROR writing index");
                                return retval;
                        }
 
@@ -498,7 +496,7 @@ uint32_t arm946e_invalidate_icache(struct target *target, uint32_t address,
                                retval = arm946e_write_cp15(target, 0x1d, 0x0);
                                if (retval != ERROR_OK)
                                {
-                                       LOG_DEBUG("ERROR flushing cache line\n");
+                                       LOG_DEBUG("ERROR flushing cache line");
                                        return retval;
                                }
 
@@ -512,7 +510,7 @@ uint32_t arm946e_invalidate_icache(struct target *target, uint32_t address,
 
 /** Writes a buffer, in the specified word size, with current MMU settings. */
 int arm946e_write_memory(struct target *target, uint32_t address,
-               uint32_t size, uint32_t count, uint8_t *buffer)
+               uint32_t size, uint32_t count, const uint8_t *buffer)
 {
        int retval;