Fix logically inverted comment

[fw/openocd] / src / target / arm926ejs.c

diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c
index a6ef5e10cce1758b7a74cd7ab9b4aea6646089e7..cef7061ed13ac3e05d4c958ee96f20afaf7d21b7 100644 (file)
--- a/src/target/arm926ejs.c
+++ b/src/target/arm926ejs.c
@@ -22,12 +22,8 @@
 #endif
 
 #include "arm926ejs.h"
-#include "jtag.h"
-#include "log.h"
 #include "time_support.h"
 
-#include <stdlib.h>
-#include <string.h>
 
 #if 0
 #define _DEBUG_INSTRUCTION_EXECUTION_
@@ -96,6 +92,10 @@ target_type_t arm926ejs_target =
 
 int arm926ejs_catch_broken_irscan(u8 *captured, void *priv, scan_field_t *field)
 {
+       /* FIX!!!! this code should be reenabled. For now it does not check
+        * the queue...*/
+       return 0;
+#if 0
        /* The ARM926EJ-S' instruction register is 4 bits wide */
        u8 t = *captured & 0xf;
        u8 t2 = *field->in_check_value & 0xf;
@@ -109,6 +109,7 @@ int arm926ejs_catch_broken_irscan(u8 *captured, void *priv, scan_field_t *field)
                return ERROR_OK;
        }
        return ERROR_JTAG_QUEUE_FAILED;;
+#endif
 }
 
 #define ARM926EJS_CP15_ADDR(opcode_1, opcode_2, CRn, CRm) ((opcode_1 << 11) | (opcode_2 << 8) | (CRn << 4) | (CRm << 0))
@@ -128,7 +129,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
        buf_set_u32(address_buf, 0, 14, address);
 
        jtag_add_end_state(TAP_IDLE);
-       if((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
+       if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
        {
                return retval;
        }
@@ -137,48 +138,26 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
        fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
-       fields[0].out_mask = NULL;
-       fields[0].in_value = NULL;
-       fields[0].in_check_value = NULL;
-       fields[0].in_check_mask = NULL;
-       fields[0].in_handler = NULL;
-       fields[0].in_handler_priv = NULL;
+       fields[0].in_value = (u8 *)value;
+
 
        fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 1;
        fields[1].out_value = &access;
-       fields[1].out_mask = NULL;
        fields[1].in_value = &access;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
 
        fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 14;
        fields[2].out_value = address_buf;
-       fields[2].out_mask = NULL;
        fields[2].in_value = NULL;
-       fields[2].in_check_value = NULL;
-       fields[2].in_check_mask = NULL;
-       fields[2].in_handler = NULL;
-       fields[2].in_handler_priv = NULL;
 
        fields[3].tap = jtag_info->tap;
        fields[3].num_bits = 1;
        fields[3].out_value = &nr_w_buf;
-       fields[3].out_mask = NULL;
        fields[3].in_value = NULL;
-       fields[3].in_check_value = NULL;
-       fields[3].in_check_mask = NULL;
-       fields[3].in_handler = NULL;
-       fields[3].in_handler_priv = NULL;
 
        jtag_add_dr_scan(4, fields, TAP_INVALID);
 
-       fields[0].in_handler_priv = value;
-       fields[0].in_handler = arm_jtag_buf_to_u32;
-
        /*TODO: add timeout*/
        do
        {
@@ -186,7 +165,10 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
                access = 0;
                nr_w_buf = 0;
                jtag_add_dr_scan(4, fields, TAP_INVALID);
-               if((retval = jtag_execute_queue()) != ERROR_OK)
+
+               jtag_add_callback(arm_le_to_h_u32, (u8 *)value);
+
+               if ((retval = jtag_execute_queue()) != ERROR_OK)
                {
                        return retval;
                }
@@ -218,7 +200,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
        buf_set_u32(value_buf, 0, 32, value);
 
        jtag_add_end_state(TAP_IDLE);
-       if((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
+       if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
        {
                return retval;
        }
@@ -227,42 +209,22 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
        fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = value_buf;
-       fields[0].out_mask = NULL;
        fields[0].in_value = NULL;
-       fields[0].in_check_value = NULL;
-       fields[0].in_check_mask = NULL;
-       fields[0].in_handler = NULL;
-       fields[0].in_handler_priv = NULL;
 
        fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 1;
        fields[1].out_value = &access;
-       fields[1].out_mask = NULL;
        fields[1].in_value = &access;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
 
        fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 14;
        fields[2].out_value = address_buf;
-       fields[2].out_mask = NULL;
        fields[2].in_value = NULL;
-       fields[2].in_check_value = NULL;
-       fields[2].in_check_mask = NULL;
-       fields[2].in_handler = NULL;
-       fields[2].in_handler_priv = NULL;
 
        fields[3].tap = jtag_info->tap;
        fields[3].num_bits = 1;
        fields[3].out_value = &nr_w_buf;
-       fields[3].out_mask = NULL;
        fields[3].in_value = NULL;
-       fields[3].in_check_value = NULL;
-       fields[3].in_check_mask = NULL;
-       fields[3].in_handler = NULL;
-       fields[3].in_handler_priv = NULL;
 
        jtag_add_dr_scan(4, fields, TAP_INVALID);
        /*TODO: add timeout*/
@@ -272,7 +234,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
                access = 0;
                nr_w_buf = 0;
                jtag_add_dr_scan(4, fields, TAP_INVALID);
-               if((retval = jtag_execute_queue()) != ERROR_OK)
+               if ((retval = jtag_execute_queue()) != ERROR_OK)
                {
                        return retval;
                }
@@ -604,7 +566,7 @@ int arm926ejs_soft_reset_halt(struct target_s *target)
        arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
        reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
 
-       if((retval = target_halt(target)) != ERROR_OK)
+       if ((retval = target_halt(target)) != ERROR_OK)
        {
                return retval;
        }
@@ -616,7 +578,7 @@ int arm926ejs_soft_reset_halt(struct target_s *target)
                if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) == 0)
                {
                        embeddedice_read_reg(dbg_stat);
-                       if((retval = jtag_execute_queue()) != ERROR_OK)
+                       if ((retval = jtag_execute_queue()) != ERROR_OK)
                        {
                                return retval;
                        }
@@ -821,7 +783,7 @@ int arm926ejs_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd,
                        command_print(cmd_ctx, "couldn't access register");
                        return ERROR_OK;
                }
-               if((retval = jtag_execute_queue()) != ERROR_OK)
+               if ((retval = jtag_execute_queue()) != ERROR_OK)
                {
                        return retval;
                }