+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* Copyright (C) 2007,2008,2009 by Øyvind Harboe *
* oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#define _DEBUG_INSTRUCTION_EXECUTION_
#endif
-#define ARM926EJS_CP15_ADDR(opcode_1, opcode_2, CRn, CRm) ((opcode_1 << 11) | (opcode_2 << 8) | (CRn << 4) | (CRm << 0))
+#define ARM926EJS_CP15_ADDR(opcode_1, opcode_2, crn, crm) ((opcode_1 << 11) | (opcode_2 << 8) | (crn << 4) | (crm << 0))
static int arm926ejs_cp15_read(struct target *target, uint32_t op1, uint32_t op2,
- uint32_t CRn, uint32_t CRm, uint32_t *value)
+ uint32_t crn, uint32_t crm, uint32_t *value)
{
int retval = ERROR_OK;
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
- uint32_t address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm);
+ uint32_t address = ARM926EJS_CP15_ADDR(op1, op2, crn, crm);
struct scan_field fields[4];
uint8_t address_buf[2] = {0, 0};
uint8_t nr_w_buf = 0;
retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
- retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
jtag_add_dr_scan(jtag_info->tap, 4, fields, TAP_IDLE);
- long long then = timeval_ms();
+ int64_t then = timeval_ms();
for (;;) {
/* rescan with NOP, to wait for the access to complete */
LOG_DEBUG("addr: 0x%x value: %8.8x", address, *value);
#endif
- retval = arm_jtag_set_instr(jtag_info, 0xc, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info->tap, 0xc, NULL, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
}
static int arm926ejs_mrc(struct target *target, int cpnum, uint32_t op1,
- uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+ uint32_t op2, uint32_t crn, uint32_t crm, uint32_t *value)
{
if (cpnum != 15) {
LOG_ERROR("Only cp15 is supported");
return ERROR_FAIL;
}
- return arm926ejs_cp15_read(target, op1, op2, CRn, CRm, value);
+ return arm926ejs_cp15_read(target, op1, op2, crn, crm, value);
}
static int arm926ejs_cp15_write(struct target *target, uint32_t op1, uint32_t op2,
- uint32_t CRn, uint32_t CRm, uint32_t value)
+ uint32_t crn, uint32_t crm, uint32_t value)
{
int retval = ERROR_OK;
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
- uint32_t address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm);
+ uint32_t address = ARM926EJS_CP15_ADDR(op1, op2, crn, crm);
struct scan_field fields[4];
uint8_t value_buf[4];
uint8_t address_buf[2] = {0, 0};
retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
- retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
jtag_add_dr_scan(jtag_info->tap, 4, fields, TAP_IDLE);
- long long then = timeval_ms();
+ int64_t then = timeval_ms();
for (;;) {
/* rescan with NOP, to wait for the access to complete */
LOG_DEBUG("addr: 0x%x value: %8.8x", address, value);
#endif
- retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(jtag_info->tap, 0xf, NULL, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
}
static int arm926ejs_mcr(struct target *target, int cpnum, uint32_t op1,
- uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+ uint32_t op2, uint32_t crn, uint32_t crm, uint32_t value)
{
if (cpnum != 15) {
LOG_ERROR("Only cp15 is supported");
return ERROR_FAIL;
}
- return arm926ejs_cp15_write(target, op1, op2, CRn, CRm, value);
+ return arm926ejs_cp15_write(target, op1, op2, crn, crm, value);
}
static int arm926ejs_examine_debug_reason(struct target *target)
static const char arm926_not[] = "target is not an ARM926";
-static int arm926ejs_verify_pointer(struct command_context *cmd_ctx,
+static int arm926ejs_verify_pointer(struct command_invocation *cmd,
struct arm926ejs_common *arm926)
{
if (arm926->common_magic != ARM926EJS_COMMON_MAGIC) {
- command_print(cmd_ctx, arm926_not);
+ command_print(cmd, arm926_not);
return ERROR_TARGET_INVALID;
}
return ERROR_OK;
if (retval != ERROR_OK)
return retval;
- long long then = timeval_ms();
+ int64_t then = timeval_ms();
int timeout;
while (!(timeout = ((timeval_ms()-then) > 1000))) {
if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) == 0) {
cpsr &= ~0xff;
cpsr |= 0xd3;
arm_set_cpsr(arm, cpsr);
- arm->cpsr->dirty = 1;
+ arm->cpsr->dirty = true;
/* start fetching from 0x0 */
buf_set_u32(arm->pc->value, 0, 32, 0x0);
- arm->pc->dirty = 1;
- arm->pc->valid = 1;
+ arm->pc->dirty = true;
+ arm->pc->valid = true;
retval = arm926ejs_disable_mmu_caches(target, 1, 1, 1);
if (retval != ERROR_OK)
}
/** Writes a buffer, in the specified word size, with current MMU settings. */
-int arm926ejs_write_memory(struct target *target, uint32_t address,
+int arm926ejs_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
int retval;
return retval;
}
- uint32_t pa;
+ target_addr_t pa;
retval = target->type->virt2phys(target, address, &pa);
if (retval != ERROR_OK)
return retval;
}
static int arm926ejs_write_phys_memory(struct target *target,
- uint32_t address, uint32_t size,
+ target_addr_t address, uint32_t size,
uint32_t count, const uint8_t *buffer)
{
struct arm926ejs_common *arm926ejs = target_to_arm926(target);
}
static int arm926ejs_read_phys_memory(struct target *target,
- uint32_t address, uint32_t size,
+ target_addr_t address, uint32_t size,
uint32_t count, uint8_t *buffer)
{
struct arm926ejs_common *arm926ejs = target_to_arm926(target);
arm7_9->post_debug_entry = arm926ejs_post_debug_entry;
arm7_9->pre_restore_context = arm926ejs_pre_restore_context;
+ arm7_9->write_memory = arm926ejs_write_memory;
arm926ejs->read_cp15 = arm926ejs_cp15_read;
arm926ejs->write_cp15 = arm926ejs_cp15_write;
return arm926ejs_init_arch_info(target, arm926ejs, target->tap);
}
+static void arm926ejs_deinit_target(struct target *target)
+{
+ struct arm *arm = target_to_arm(target);
+ struct arm926ejs_common *arm926ejs = target_to_arm926(target);
+
+ arm7_9_deinit(target);
+ arm_free_reg_cache(arm);
+ free(arm926ejs);
+}
+
COMMAND_HANDLER(arm926ejs_handle_cache_info_command)
{
int retval;
struct target *target = get_current_target(CMD_CTX);
struct arm926ejs_common *arm926ejs = target_to_arm926(target);
- retval = arm926ejs_verify_pointer(CMD_CTX, arm926ejs);
+ retval = arm926ejs_verify_pointer(CMD, arm926ejs);
if (retval != ERROR_OK)
return retval;
- return armv4_5_handle_cache_info_command(CMD_CTX, &arm926ejs->armv4_5_mmu.armv4_5_cache);
+ return armv4_5_handle_cache_info_command(CMD, &arm926ejs->armv4_5_mmu.armv4_5_cache);
}
-static int arm926ejs_virt2phys(struct target *target, uint32_t virtual, uint32_t *physical)
+static int arm926ejs_virt2phys(struct target *target, target_addr_t virtual, target_addr_t *physical)
{
uint32_t cb;
struct arm926ejs_common *arm926ejs = target_to_arm926(target);
.deassert_reset = arm7_9_deassert_reset,
.soft_reset_halt = arm926ejs_soft_reset_halt,
+ .get_gdb_arch = arm_get_gdb_arch,
.get_gdb_reg_list = arm_get_gdb_reg_list,
.read_memory = arm7_9_read_memory,
- .write_memory = arm926ejs_write_memory,
- .bulk_write_memory = arm7_9_bulk_write_memory,
+ .write_memory = arm7_9_write_memory_opt,
.checksum_memory = arm_checksum_memory,
.blank_check_memory = arm_blank_check_memory,
.commands = arm926ejs_command_handlers,
.target_create = arm926ejs_target_create,
.init_target = arm9tdmi_init_target,
+ .deinit_target = arm926ejs_deinit_target,
.examine = arm7_9_examine,
.check_reset = arm7_9_check_reset,
.virt2phys = arm926ejs_virt2phys,
projects / fw / openocd / blobdiff