- explicitly disable monitor mode on ARM7/9 targets

[fw/openocd] / src / target / arm926ejs.c

diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c
index 78d128de74e6b4ea36871847e04aeb99906dbc50..3931e89871af8d0e3b57ae3cd7d88286118bf5eb 100644 (file)
--- a/src/target/arm926ejs.c
+++ b/src/target/arm926ejs.c
@@ -70,6 +70,7 @@ target_type_t arm926ejs_target =
        .assert_reset = arm7_9_assert_reset,
        .deassert_reset = arm7_9_deassert_reset,
        .soft_reset_halt = arm926ejs_soft_reset_halt,
+       .prepare_reset_halt = arm7_9_prepare_reset_halt,
        
        .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
 
@@ -158,7 +159,7 @@ int arm926ejs_read_cp15(target_t *target, u32 address, u32 *value)
        {
                jtag_add_dr_scan(4, fields, -1);
                jtag_execute_queue();
-       } while ((access & 1) != 1);
+       } while (buf_get_u32(&access, 0, 1) != 1);
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
        DEBUG("addr: 0x%x value: %8.8x", address, *value);
@@ -234,7 +235,7 @@ int arm926ejs_write_cp15(target_t *target, u32 address, u32 value)
        {
                jtag_add_dr_scan(4, fields, -1);
                jtag_execute_queue();
-       } while (access != 1);
+       } while (buf_get_u32(&access, 0, 1) != 1);
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
        DEBUG("addr: 0x%x value: %8.8x", address, value);