#include "target_type.h"
-#if 0
-#define _DEBUG_INSTRUCTION_EXECUTION_
-#endif
+/*
+ * The ARM926 is built around the ARM9EJ-S core, and most JTAG docs
+ * are in the ARM9EJ-S Technical Reference Manual (ARM DDI 0222B) not
+ * the ARM926 manual (ARM DDI 0198E). The scan chains are:
+ *
+ * 1 ... core debugging
+ * 2 ... EmbeddedICE
+ * 3 ... external boundary scan (SoC-specific, unused here)
+ * 6 ... ETM
+ * 15 ... coprocessor 15
+ */
-static int arm926ejs_catch_broken_irscan(uint8_t *captured, void *priv,
- scan_field_t *field)
-{
- /* FIX!!!! this code should be reenabled. For now it does not check
- * the queue...*/
- return 0;
#if 0
- /* The ARM926EJ-S' instruction register is 4 bits wide */
- uint8_t t = *captured & 0xf;
- uint8_t t2 = *field->in_check_value & 0xf;
- if (t == t2)
- {
- return ERROR_OK;
- }
- else if ((t == 0x0f) || (t == 0x00))
- {
- LOG_DEBUG("caught ARM926EJ-S invalid Capture-IR result after CP15 access");
- return ERROR_OK;
- }
- return ERROR_JTAG_QUEUE_FAILED;;
+#define _DEBUG_INSTRUCTION_EXECUTION_
#endif
-}
#define ARM926EJS_CP15_ADDR(opcode_1, opcode_2, CRn, CRm) ((opcode_1 << 11) | (opcode_2 << 8) | (CRn << 4) | (CRm << 0))
uint32_t CRn, uint32_t CRm, uint32_t *value)
{
int retval = ERROR_OK;
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
uint32_t address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm);
- scan_field_t fields[4];
+ struct scan_field fields[4];
uint8_t address_buf[2];
uint8_t nr_w_buf = 0;
uint8_t access = 1;
LOG_DEBUG("addr: 0x%x value: %8.8x", address, *value);
#endif
- arm_jtag_set_instr(jtag_info, 0xc, &arm926ejs_catch_broken_irscan);
+ arm_jtag_set_instr(jtag_info, 0xc, NULL);
return ERROR_OK;
}
uint32_t CRn, uint32_t CRm, uint32_t value)
{
int retval = ERROR_OK;
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
uint32_t address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm);
- scan_field_t fields[4];
+ struct scan_field fields[4];
uint8_t value_buf[4];
uint8_t address_buf[2];
uint8_t nr_w_buf = 1;
LOG_DEBUG("addr: 0x%x value: %8.8x", address, value);
#endif
- arm_jtag_set_instr(jtag_info, 0xf, &arm926ejs_catch_broken_irscan);
+ arm_jtag_set_instr(jtag_info, 0xf, NULL);
return ERROR_OK;
}
static int arm926ejs_examine_debug_reason(target_t *target)
{
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
int debug_reason;
int retval;
static uint32_t arm926ejs_get_ttb(target_t *target)
{
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
- arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
+ struct arm926ejs_common_s *arm926ejs = target_to_arm926(target);
int retval;
uint32_t ttb = 0x0;
static void arm926ejs_disable_mmu_caches(target_t *target, int mmu,
int d_u_cache, int i_cache)
{
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
- arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
+ struct arm926ejs_common_s *arm926ejs = target_to_arm926(target);
uint32_t cp15_control;
/* read cp15 control register */
static void arm926ejs_enable_mmu_caches(target_t *target, int mmu,
int d_u_cache, int i_cache)
{
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
- arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
+ struct arm926ejs_common_s *arm926ejs = target_to_arm926(target);
uint32_t cp15_control;
/* read cp15 control register */
static void arm926ejs_post_debug_entry(target_t *target)
{
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
- arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
+ struct arm926ejs_common_s *arm926ejs = target_to_arm926(target);
/* examine cp15 control reg */
arm926ejs->read_cp15(target, 0, 0, 1, 0, &arm926ejs->cp15_control_reg);
static void arm926ejs_pre_restore_context(target_t *target)
{
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
- arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
+ struct arm926ejs_common_s *arm926ejs = target_to_arm926(target);
/* restore i/d fault status and address register */
arm926ejs->write_cp15(target, 0, 0, 5, 0, arm926ejs->d_fsr);
arm926ejs->write_cp15(target, 7, 0, 15, 0, cache_dbg_ctrl);
}
-static int arm926ejs_get_arch_pointers(target_t *target,
- armv4_5_common_t **armv4_5_p,
- arm7_9_common_t **arm7_9_p,
- arm9tdmi_common_t **arm9tdmi_p,
- arm926ejs_common_t **arm926ejs_p)
-{
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9;
- arm9tdmi_common_t *arm9tdmi;
- arm926ejs_common_t *arm926ejs;
-
- if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
- {
- return -1;
- }
+static const char arm926_not[] = "target is not an ARM926";
- arm7_9 = armv4_5->arch_info;
- if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC)
- {
- return -1;
- }
-
- arm9tdmi = arm7_9->arch_info;
- if (arm9tdmi->common_magic != ARM9TDMI_COMMON_MAGIC)
- {
- return -1;
- }
-
- arm926ejs = arm9tdmi->arch_info;
- if (arm926ejs->common_magic != ARM926EJS_COMMON_MAGIC)
- {
- return -1;
+static int arm926ejs_verify_pointer(struct command_context_s *cmd_ctx,
+ struct arm926ejs_common_s *arm926)
+{
+ if (arm926->common_magic != ARM926EJS_COMMON_MAGIC) {
+ command_print(cmd_ctx, arm926_not);
+ return ERROR_TARGET_INVALID;
}
-
- *armv4_5_p = armv4_5;
- *arm7_9_p = arm7_9;
- *arm9tdmi_p = arm9tdmi;
- *arm926ejs_p = arm926ejs;
-
return ERROR_OK;
}
+/** Logs summary of ARM926 state for a halted target. */
int arm926ejs_arch_state(struct target_s *target)
{
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
- arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
-
- char *state[] =
+ static const char *state[] =
{
"disabled", "enabled"
};
- if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
+ struct arm926ejs_common_s *arm926ejs = target_to_arm926(target);
+ struct armv4_5_common_s *armv4_5;
+
+ if (arm926ejs->common_magic != ARM926EJS_COMMON_MAGIC)
{
- LOG_ERROR("BUG: called for a non-ARMv4/5 target");
- exit(-1);
+ LOG_ERROR("BUG: %s", arm926_not);
+ return ERROR_TARGET_INVALID;
}
- LOG_USER(
- "target halted in %s state due to %s, current mode: %s\n"
+ armv4_5 = &arm926ejs->arm9tdmi_common.arm7_9_common.armv4_5_common;
+
+ LOG_USER("target halted in %s state due to %s, current mode: %s\n"
"cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
"MMU: %s, D-Cache: %s, I-Cache: %s",
armv4_5_state_strings[armv4_5->core_state],
int arm926ejs_soft_reset_halt(struct target_s *target)
{
int retval = ERROR_OK;
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
- arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
+ struct arm926ejs_common_s *arm926ejs = target_to_arm926(target);
+ struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
+ struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
if ((retval = target_halt(target)) != ERROR_OK)
return target_call_event_callbacks(target, TARGET_EVENT_HALTED);
}
+/** Writes a buffer, in the specified word size, with current MMU settings. */
int arm926ejs_write_memory(struct target_s *target, uint32_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
int retval;
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
- arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
+ struct arm926ejs_common_s *arm926ejs = target_to_arm926(target);
/* FIX!!!! this should be cleaned up and made much more general. The
* plan is to write up and test on arm926ejs specifically and
uint32_t address, uint32_t size,
uint32_t count, uint8_t *buffer)
{
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
- arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
+ struct arm926ejs_common_s *arm926ejs = target_to_arm926(target);
- return armv4_5_mmu_write_physical(target, &arm926ejs->armv4_5_mmu, address, size, count, buffer);
+ return armv4_5_mmu_write_physical(target, &arm926ejs->armv4_5_mmu,
+ address, size, count, buffer);
}
static int arm926ejs_read_phys_memory(struct target_s *target,
uint32_t address, uint32_t size,
uint32_t count, uint8_t *buffer)
{
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
- arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
-
- return armv4_5_mmu_read_physical(target, &arm926ejs->armv4_5_mmu, address, size, count, buffer);
-}
-
-static int arm926ejs_init_target(struct command_context_s *cmd_ctx,
- struct target_s *target)
-{
- arm9tdmi_init_target(cmd_ctx, target);
+ struct arm926ejs_common_s *arm926ejs = target_to_arm926(target);
- return ERROR_OK;
-}
-
-static int arm926ejs_quit(void)
-{
- return ERROR_OK;
+ return armv4_5_mmu_read_physical(target, &arm926ejs->armv4_5_mmu,
+ address, size, count, buffer);
}
int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs,
- jtag_tap_t *tap)
+ struct jtag_tap *tap)
{
arm9tdmi_common_t *arm9tdmi = &arm926ejs->arm9tdmi_common;
arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;
*/
arm9tdmi_init_arch_info(target, arm9tdmi, tap);
- arm9tdmi->arch_info = arm926ejs;
arm926ejs->common_magic = ARM926EJS_COMMON_MAGIC;
arm7_9->post_debug_entry = arm926ejs_post_debug_entry;
{
arm926ejs_common_t *arm926ejs = calloc(1,sizeof(arm926ejs_common_t));
- arm926ejs_init_arch_info(target, arm926ejs, target->tap);
+ /* ARM9EJ-S core always reports 0x1 in Capture-IR */
+ target->tap->ir_capture_mask = 0x0f;
- return ERROR_OK;
+ return arm926ejs_init_arch_info(target, arm926ejs, target->tap);
}
-static int arm926ejs_handle_cp15_command(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
+COMMAND_HANDLER(arm926ejs_handle_cp15_command)
{
int retval;
target_t *target = get_current_target(cmd_ctx);
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
- arm9tdmi_common_t *arm9tdmi;
- arm926ejs_common_t *arm926ejs;
+ struct arm926ejs_common_s *arm926ejs = target_to_arm926(target);
int opcode_1;
int opcode_2;
int CRn;
return ERROR_OK;
}
- opcode_1 = strtoul(args[0], NULL, 0);
- opcode_2 = strtoul(args[1], NULL, 0);
- CRn = strtoul(args[2], NULL, 0);
- CRm = strtoul(args[3], NULL, 0);
+ COMMAND_PARSE_NUMBER(int, args[0], opcode_1);
+ COMMAND_PARSE_NUMBER(int, args[1], opcode_2);
+ COMMAND_PARSE_NUMBER(int, args[2], CRn);
+ COMMAND_PARSE_NUMBER(int, args[3], CRm);
- if (arm926ejs_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm926ejs) != ERROR_OK)
- {
- command_print(cmd_ctx, "current target isn't an ARM926EJ-S target");
- return ERROR_OK;
- }
+ retval = arm926ejs_verify_pointer(cmd_ctx, arm926ejs);
+ if (retval != ERROR_OK)
+ return retval;
if (target->state != TARGET_HALTED)
{
- command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
+ command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME);
return ERROR_OK;
}
}
else
{
- uint32_t value = strtoul(args[4], NULL, 0);
+ uint32_t value;
+ COMMAND_PARSE_NUMBER(u32, args[4], value);
if ((retval = arm926ejs->write_cp15(target, opcode_1, opcode_2, CRn, CRm, value)) != ERROR_OK)
{
command_print(cmd_ctx, "couldn't access register");
return ERROR_OK;
}
-static int
-arm926ejs_handle_cache_info_command(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
+COMMAND_HANDLER(arm926ejs_handle_cache_info_command)
{
+ int retval;
target_t *target = get_current_target(cmd_ctx);
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
- arm9tdmi_common_t *arm9tdmi;
- arm926ejs_common_t *arm926ejs;
+ struct arm926ejs_common_s *arm926ejs = target_to_arm926(target);
- if (arm926ejs_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm926ejs) != ERROR_OK)
- {
- command_print(cmd_ctx, "current target isn't an ARM926EJ-S target");
- return ERROR_OK;
- }
+ retval = arm926ejs_verify_pointer(cmd_ctx, arm926ejs);
+ if (retval != ERROR_OK)
+ return retval;
return armv4_5_handle_cache_info_command(cmd_ctx, &arm926ejs->armv4_5_mmu.armv4_5_cache);
}
static int arm926ejs_virt2phys(struct target_s *target, uint32_t virtual, uint32_t *physical)
{
- int retval;
int type;
uint32_t cb;
int domain;
uint32_t ap;
+ struct arm926ejs_common_s *arm926ejs = target_to_arm926(target);
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
- arm9tdmi_common_t *arm9tdmi;
- arm926ejs_common_t *arm926ejs;
- retval= arm926ejs_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm926ejs);
- if (retval != ERROR_OK)
- {
- return retval;
- }
uint32_t ret = armv4_5_mmu_translate_va(target, &arm926ejs->armv4_5_mmu, virtual, &type, &cb, &domain, &ap);
if (type == -1)
{
static int arm926ejs_mmu(struct target_s *target, int *enabled)
{
- armv4_5_common_t *armv4_5 = target->arch_info;
- arm7_9_common_t *arm7_9 = armv4_5->arch_info;
- arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
- arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
+ struct arm926ejs_common_s *arm926ejs = target_to_arm926(target);
if (target->state != TARGET_HALTED)
{
return ERROR_OK;
}
+/** Registers commands to access coprocessor, cache, and debug resources. */
int arm926ejs_register_commands(struct command_context_s *cmd_ctx)
{
int retval;
return retval;
}
+/** Holds methods for ARM926 targets. */
target_type_t arm926ejs_target =
{
.name = "arm926ejs",
.register_commands = arm926ejs_register_commands,
.target_create = arm926ejs_target_create,
- .init_target = arm926ejs_init_target,
+ .init_target = arm9tdmi_init_target,
.examine = arm9tdmi_examine,
- .quit = arm926ejs_quit,
.virt2phys = arm926ejs_virt2phys,
.mmu = arm926ejs_mmu,
.mrc = arm926ejs_mrc,
.mcr = arm926ejs_mcr,
};
-
projects / fw / openocd / blobdiff