mips: mips32_pracc_exec error propagation fixes

[fw/openocd] / src / target / arm920t.c

diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index 7627b25e84e784104fdbb88f3ff577a84aa71a5c..a3a5adf1592bebfc5c226dd00694cf9371adc153 100644 (file)
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -89,11 +89,16 @@ static int arm920t_read_cp15_physical(struct target *target,
        uint8_t access_type_buf = 1;
        uint8_t reg_addr_buf = reg_addr & 0x3f;
        uint8_t nr_w_buf = 0;
+       int retval;
 
        jtag_info = &arm920t->arm7_9_common.jtag_info;
 
-       arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+       retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+       if (retval != ERROR_OK)
+               return retval;
 
        fields[0].num_bits = 1;
        fields[0].out_value = &access_type_buf;
@@ -137,13 +142,18 @@ static int arm920t_write_cp15_physical(struct target *target,
        uint8_t reg_addr_buf = reg_addr & 0x3f;
        uint8_t nr_w_buf = 1;
        uint8_t value_buf[4];
+       int retval;
 
        jtag_info = &arm920t->arm7_9_common.jtag_info;
 
        buf_set_u32(value_buf, 0, 32, value);
 
-       arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+       retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+       if (retval != ERROR_OK)
+               return retval;
 
        fields[0].num_bits = 1;
        fields[0].out_value = &access_type_buf;
@@ -191,8 +201,12 @@ static int arm920t_execute_cp15(struct target *target, uint32_t cp15_opcode,
 
        jtag_info = &arm920t->arm7_9_common.jtag_info;
 
-       arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+       retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE);
+       if (retval != ERROR_OK)
+               return retval;
+       retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
+       if (retval != ERROR_OK)
+               return retval;
 
        buf_set_u32(cp15_opcode_buf, 0, 32, cp15_opcode);
 
@@ -267,7 +281,10 @@ static int arm920t_read_cp15_interpreted(struct target *target,
 #endif
 
        if (!is_arm_mode(armv4_5->core_mode))
+       {
+               LOG_ERROR("not a valid arm core mode - communication failure?");
                return ERROR_FAIL;
+       }
 
        r[0].dirty = 1;
        r[1].dirty = 1;
@@ -309,7 +326,10 @@ int arm920t_write_cp15_interpreted(struct target *target,
 #endif
 
        if (!is_arm_mode(armv4_5->core_mode))
+       {
+               LOG_ERROR("not a valid arm core mode - communication failure?");
                return ERROR_FAIL;
+       }
 
        r[0].dirty = 1;
        r[1].dirty = 1;
@@ -1140,7 +1160,10 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command)
        fclose(output);
 
        if (!is_arm_mode(armv4_5->core_mode))
+       {
+               LOG_ERROR("not a valid arm core mode - communication failure?");
                return ERROR_FAIL;
+       }
 
        /* force writeback of the valid data */
        r = armv4_5->core_cache->reg_list;
@@ -1467,7 +1490,10 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command)
        fclose(output);
 
        if (!is_arm_mode(armv4_5->core_mode))
+       {
+               LOG_ERROR("not a valid arm core mode - communication failure?");
                return ERROR_FAIL;
+       }
 
        /* force writeback of the valid data */
        r = armv4_5->core_cache->reg_list;