reset cleanup

[fw/openocd] / src / target / arm920t.c

diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index 3d178161481b5096dc6c252331649815e76a861a..5b4c175fdddd9da3ad72101c5728fe21c2795bd9 100644 (file)
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -24,6 +24,7 @@
 #include "arm920t.h"
 #include "jtag.h"
 #include "log.h"
+#include "time_support.h"
 
 #include <stdlib.h>
 #include <string.h>
@@ -46,9 +47,9 @@ int arm920t_handle_read_cache_command(struct command_context_s *cmd_ctx, char *c
 int arm920t_handle_read_mmu_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 
 /* forward declarations */
-int arm920t_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
+int arm920t_target_create(struct target_s *target, Jim_Interp *interp);
 int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int arm920t_quit();
+int arm920t_quit(void);
 int arm920t_arch_state(struct target_s *target);
 int arm920t_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
 int arm920t_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
@@ -72,7 +73,6 @@ target_type_t arm920t_target =
        .assert_reset = arm7_9_assert_reset,
        .deassert_reset = arm7_9_deassert_reset,
        .soft_reset_halt = arm920t_soft_reset_halt,
-       .prepare_reset_halt = arm7_9_prepare_reset_halt,
        
        .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
 
@@ -80,6 +80,7 @@ target_type_t arm920t_target =
        .write_memory = arm920t_write_memory,
        .bulk_write_memory = arm7_9_bulk_write_memory,
        .checksum_memory = arm7_9_checksum_memory,
+       .blank_check_memory = arm7_9_blank_check_memory,
        
        .run_algorithm = armv4_5_run_algorithm,
 
@@ -89,8 +90,9 @@ target_type_t arm920t_target =
        .remove_watchpoint = arm7_9_remove_watchpoint,
 
        .register_commands = arm920t_register_commands,
-       .target_command = arm920t_target_command,
+       .target_create = arm920t_target_create,
        .init_target = arm920t_init_target,
+       .examine = arm9tdmi_examine,
        .quit = arm920t_quit
 };
 
@@ -335,6 +337,9 @@ int arm920t_read_cp15_interpreted(target_t *target, u32 cp15_opcode, u32 address
        LOG_DEBUG("cp15_opcode: %8.8x, address: %8.8x, value: %8.8x", cp15_opcode, address, *value);
 #endif
 
+       if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+               return ERROR_FAIL;
+
        ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = 1;
        ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).dirty = 1;
 
@@ -370,6 +375,9 @@ int arm920t_write_cp15_interpreted(target_t *target, u32 cp15_opcode, u32 value,
        LOG_DEBUG("cp15_opcode: %8.8x, value: %8.8x, address: %8.8x", cp15_opcode, value, address);
 #endif
 
+       if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+               return ERROR_FAIL;
+       
        ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = 1;
        ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).dirty = 1;
        
@@ -558,7 +566,7 @@ int arm920t_arch_state(struct target_s *target)
                        "cpsr: 0x%8.8x pc: 0x%8.8x\n"
                        "MMU: %s, D-Cache: %s, I-Cache: %s",
                         armv4_5_state_strings[armv4_5->core_state],
-                        target_debug_reason_strings[target->debug_reason],
+                        Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name,
                         armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)],
                         buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32),
                         buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
@@ -623,12 +631,33 @@ int arm920t_soft_reset_halt(struct target_s *target)
        arm920t_common_t *arm920t = arm9tdmi->arch_info;
        reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
        
-       target->type->halt(target);
+       target_halt(target);
        
-       while (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) == 0)
+       long long then=timeval_ms();
+       int timeout;
+       while (!(timeout=((timeval_ms()-then)>1000)))
        {
-               embeddedice_read_reg(dbg_stat);
-               jtag_execute_queue();
+               if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) == 0)
+               {
+                       embeddedice_read_reg(dbg_stat);
+                       jtag_execute_queue();
+               } else
+               {
+                       break;
+               }
+               if (debug_level>=3)
+               {
+                       /* do not eat all CPU, time out after 1 se*/
+                       alive_sleep(100);
+               } else
+               {
+                       keep_alive();
+               }
+       }
+       if (timeout)
+       {
+               LOG_ERROR("Failed to halt CPU after 1 sec");
+               return ERROR_TARGET_TIMEOUT;
        }
        
        target->state = TARGET_HALTED;
@@ -664,13 +693,13 @@ int arm920t_init_target(struct command_context_s *cmd_ctx, struct target_s *targ
        
 }
 
-int arm920t_quit()
+int arm920t_quit(void)
 {
        
        return ERROR_OK;
 }
 
-int arm920t_init_arch_info(target_t *target, arm920t_common_t *arm920t, int chain_pos, char *variant)
+int arm920t_init_arch_info(target_t *target, arm920t_common_t *arm920t, int chain_pos, const char *variant)
 {
        arm9tdmi_common_t *arm9tdmi = &arm920t->arm9tdmi_common;
        arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;
@@ -706,27 +735,11 @@ int arm920t_init_arch_info(target_t *target, arm920t_common_t *arm920t, int chai
        return ERROR_OK;
 }
 
-int arm920t_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target)
+int arm920t_target_create(struct target_s *target, Jim_Interp *interp)
 {
-       int chain_pos;
-       char *variant = NULL;
-       arm920t_common_t *arm920t = malloc(sizeof(arm920t_common_t));
-       memset(arm920t, 0, sizeof(*arm920t));
-       
-       if (argc < 4)
-       {
-               LOG_ERROR("'target arm920t' requires at least one additional argument");
-               exit(-1);
-       }
+       arm920t_common_t *arm920t = calloc(1,sizeof(arm920t_common_t));
        
-       chain_pos = strtoul(args[3], NULL, 0);
-       
-       if (argc >= 5)
-               variant = args[4];
-       
-       LOG_DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
-       
-       arm920t_init_arch_info(target, arm920t, chain_pos, variant);
+       arm920t_init_arch_info(target, arm920t, target->chain_position, target->variant);
 
        return ERROR_OK;
 }
@@ -986,6 +999,9 @@ int arm920t_handle_read_cache_command(struct command_context_s *cmd_ctx, char *c
        
        fclose(output);
        
+       if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+               return ERROR_FAIL;
+
        /* mark registers dirty. */
        ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).valid;
        ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).valid;
@@ -1247,6 +1263,9 @@ int arm920t_handle_read_mmu_command(struct command_context_s *cmd_ctx, char *cmd
        
        fclose(output);
        
+       if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
+               return ERROR_FAIL;
+
        /* mark registers dirty */
        ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).valid;
        ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).valid;