#include "arm7tdmi.h"
#include "target_type.h"
+#include "register.h"
+#include "arm_opcodes.h"
/*
#define _DEBUG_INSTRUCTION_EXECUTION_
#endif
-static int arm7tdmi_examine_debug_reason(target_t *target)
+static int arm7tdmi_examine_debug_reason(struct target *target)
{
int retval = ERROR_OK;
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
uint8_t databus[4];
uint8_t breakpoint;
- jtag_set_end_state(TAP_DRPAUSE);
-
- fields[0].tap = arm7_9->jtag_info.tap;
fields[0].num_bits = 1;
fields[0].out_value = NULL;
fields[0].in_value = &breakpoint;
- fields[1].tap = arm7_9->jtag_info.tap;
fields[1].num_bits = 32;
fields[1].out_value = NULL;
fields[1].in_value = databus;
- if ((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1)) != ERROR_OK)
+ if ((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
{
return retval;
}
- arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
+ retval = arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
- jtag_add_dr_scan(2, fields, jtag_set_end_state(TAP_DRPAUSE));
+ jtag_add_dr_scan(arm7_9->jtag_info.tap, 2, fields, TAP_DRPAUSE);
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
return retval;
fields[1].in_value = NULL;
fields[1].out_value = databus;
- jtag_add_dr_scan(2, fields, jtag_set_end_state(TAP_DRPAUSE));
+ jtag_add_dr_scan(arm7_9->jtag_info.tap, 2, fields, TAP_DRPAUSE);
if (breakpoint & 1)
target->debug_reason = DBG_REASON_WATCHPOINT;
2,
arm7tdmi_num_bits,
values,
- jtag_get_end_state());
+ TAP_DRPAUSE);
- jtag_add_runtest(0, jtag_get_end_state());
+ jtag_add_runtest(0, TAP_DRPAUSE);
return ERROR_OK;
}
static __inline int arm7tdmi_clock_out(struct arm_jtag *jtag_info,
uint32_t out, uint32_t *deprecated, int breakpoint)
{
- jtag_set_end_state(TAP_DRPAUSE);
- arm_jtag_scann(jtag_info, 0x1);
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
+ int retval;
+ arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
return arm7tdmi_clock_out_inner(jtag_info, out, breakpoint);
}
int retval = ERROR_OK;
struct scan_field fields[2];
- jtag_set_end_state(TAP_DRPAUSE);
- if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+ if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
{
return retval;
}
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
- fields[0].tap = jtag_info->tap;
fields[0].num_bits = 1;
fields[0].out_value = NULL;
fields[0].in_value = NULL;
- fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
fields[1].out_value = NULL;
fields[1].in_value = (uint8_t *)in;
- jtag_add_dr_scan(2, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 2, fields, TAP_DRPAUSE);
jtag_add_callback(arm7flip32, (jtag_callback_data_t)in);
- jtag_add_runtest(0, jtag_get_end_state());
+ jtag_add_runtest(0, TAP_DRPAUSE);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
if ((retval = jtag_execute_queue()) != ERROR_OK)
int retval = ERROR_OK;
struct scan_field fields[2];
- jtag_set_end_state(TAP_DRPAUSE);
- if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+ if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK)
{
return retval;
}
- arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
+ retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE);
+ if (retval != ERROR_OK)
+ return retval;
- fields[0].tap = jtag_info->tap;
fields[0].num_bits = 1;
fields[0].out_value = NULL;
fields[0].in_value = NULL;
- fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
fields[1].out_value = NULL;
jtag_alloc_in_value32(&fields[1]);
- jtag_add_dr_scan(2, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 2, fields, TAP_DRPAUSE);
jtag_add_callback4(arm7endianness, (jtag_callback_data_t)in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[1].in_value);
- jtag_add_runtest(0, jtag_get_end_state());
+ jtag_add_runtest(0, TAP_DRPAUSE);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
return ERROR_OK;
}
-static void arm7tdmi_change_to_arm(target_t *target,
+static void arm7tdmi_change_to_arm(struct target *target,
uint32_t *r0, uint32_t *pc)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
* The solution is to arrange for a large out/in scan in this loop and
* and convert data afterwards.
*/
-static void arm7tdmi_read_core_regs(target_t *target,
+static void arm7tdmi_read_core_regs(struct target *target,
uint32_t mask, uint32_t* core_regs[16])
{
int i;
}
}
-static void arm7tdmi_read_core_regs_target_buffer(target_t *target,
+static void arm7tdmi_read_core_regs_target_buffer(struct target *target,
uint32_t mask, void* buffer, int size)
{
int i;
}
}
-static void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
+static void arm7tdmi_read_xpsr(struct target *target, uint32_t *xpsr, int spsr)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
arm7tdmi_clock_data_in(jtag_info, xpsr);
}
-static void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
+static void arm7tdmi_write_xpsr(struct target *target, uint32_t xpsr, int spsr)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
}
-static void arm7tdmi_write_xpsr_im8(target_t *target,
+static void arm7tdmi_write_xpsr_im8(struct target *target,
uint8_t xpsr_im, int rot, int spsr)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
}
-static void arm7tdmi_write_core_regs(target_t *target,
+static void arm7tdmi_write_core_regs(struct target *target,
uint32_t mask, uint32_t core_regs[16])
{
int i;
arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0);
}
-static void arm7tdmi_load_word_regs(target_t *target, uint32_t mask)
+static void arm7tdmi_load_word_regs(struct target *target, uint32_t mask)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
arm7tdmi_clock_out(jtag_info, ARMV4_5_LDMIA(0, mask & 0xffff, 0, 1), NULL, 0);
}
-static void arm7tdmi_load_hword_reg(target_t *target, int num)
+static void arm7tdmi_load_hword_reg(struct target *target, int num)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRH_IP(num, 0), NULL, 0);
}
-static void arm7tdmi_load_byte_reg(target_t *target, int num)
+static void arm7tdmi_load_byte_reg(struct target *target, int num)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRB_IP(num, 0), NULL, 0);
}
-static void arm7tdmi_store_word_regs(target_t *target, uint32_t mask)
+static void arm7tdmi_store_word_regs(struct target *target, uint32_t mask)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
arm7tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask, 0, 1), NULL, 0);
}
-static void arm7tdmi_store_hword_reg(target_t *target, int num)
+static void arm7tdmi_store_hword_reg(struct target *target, int num)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
arm7tdmi_clock_out(jtag_info, ARMV4_5_STRH_IP(num, 0), NULL, 0);
}
-static void arm7tdmi_store_byte_reg(target_t *target, int num)
+static void arm7tdmi_store_byte_reg(struct target *target, int num)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
arm7tdmi_clock_out(jtag_info, ARMV4_5_STRB_IP(num, 0), NULL, 0);
}
-static void arm7tdmi_write_pc(target_t *target, uint32_t pc)
+static void arm7tdmi_write_pc(struct target *target, uint32_t pc)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0);
}
-static void arm7tdmi_branch_resume(target_t *target)
+static void arm7tdmi_branch_resume(struct target *target)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_B(0xfffffa, 0), 0);
}
-static void arm7tdmi_branch_resume_thumb(target_t *target)
+static void arm7tdmi_branch_resume_thumb(struct target *target)
{
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
+ struct arm *armv4_5 = &arm7_9->armv4_5_common;
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
/* fetch NOP, LDM in EXECUTE stage (1st cycle) */
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
/* nothing fetched, LDM in EXECUTE stage (2nd cycle) */
- arm7tdmi_clock_out(jtag_info, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) | 1, NULL, 0);
+ arm7tdmi_clock_out(jtag_info,
+ buf_get_u32(armv4_5->pc->value, 0, 32) | 1, NULL, 0);
/* nothing fetched, LDM in EXECUTE stage (3rd cycle) */
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
arm7tdmi_clock_out(jtag_info, ARMV4_5_T_B(0x7f8), NULL, 0);
}
-static void arm7tdmi_build_reg_cache(target_t *target)
+static void arm7tdmi_build_reg_cache(struct target *target)
{
struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
- struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
+ struct arm *armv4_5 = target_to_arm(target);
- (*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
- armv4_5->core_cache = (*cache_p);
+ (*cache_p) = arm_build_reg_cache(target, armv4_5);
}
-int arm7tdmi_examine(struct target_s *target)
-{
- struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
- int retval;
-
-
- if (!target_was_examined(target))
- {
- /* get pointers to arch-specific information */
- struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
- struct reg_cache *t = embeddedice_build_reg_cache(target, arm7_9);
- if (t == NULL)
- return ERROR_FAIL;
-
- (*cache_p) = t;
- arm7_9->eice_cache = (*cache_p);
-
- if (arm7_9->armv4_5_common.etm)
- {
- struct arm_jtag *jtag_info = &arm7_9->jtag_info;
- (*cache_p)->next = etm_build_reg_cache(target,
- jtag_info, arm7_9->armv4_5_common.etm);
- arm7_9->armv4_5_common.etm->reg_cache = (*cache_p)->next;
- }
- target_set_examined(target);
- }
- if ((retval = embeddedice_setup(target)) != ERROR_OK)
- return retval;
- if ((retval = arm7_9_setup(target)) != ERROR_OK)
- return retval;
- if (arm7_9->armv4_5_common.etm)
- {
- if ((retval = etm_setup(target)) != ERROR_OK)
- return retval;
- }
- return ERROR_OK;
-}
-
-int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
+int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target)
{
arm7tdmi_build_reg_cache(target);
return ERROR_OK;
}
-int arm7tdmi_init_arch_info(target_t *target, struct arm7tdmi_common *arm7tdmi, struct jtag_tap *tap)
+int arm7tdmi_init_arch_info(struct target *target,
+ struct arm7_9_common *arm7_9, struct jtag_tap *tap)
{
- struct arm7_9_common *arm7_9 = &arm7tdmi->arm7_9_common;
-
/* prepare JTAG information for the new target */
arm7_9->jtag_info.tap = tap;
arm7_9->jtag_info.scann_size = 4;
arm7_9->post_debug_entry = NULL;
arm7_9->pre_restore_context = NULL;
- arm7_9->post_restore_context = NULL;
/* initialize arch-specific breakpoint handling */
arm7_9->arm_bkpt = 0xdeeedeee;
return ERROR_OK;
}
-static int arm7tdmi_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm7tdmi_target_create(struct target *target, Jim_Interp *interp)
{
- struct arm7tdmi_common *arm7tdmi;
+ struct arm7_9_common *arm7_9;
- arm7tdmi = calloc(1,sizeof(struct arm7tdmi_common));
- arm7tdmi_init_arch_info(target, arm7tdmi, target->tap);
- arm7tdmi->arm7_9_common.armv4_5_common.is_armv4 = true;
+ arm7_9 = calloc(1,sizeof(struct arm7_9_common));
+ arm7tdmi_init_arch_info(target, arm7_9, target->tap);
+ arm7_9->armv4_5_common.is_armv4 = true;
return ERROR_OK;
}
.name = "arm7tdmi",
.poll = arm7_9_poll,
- .arch_state = armv4_5_arch_state,
+ .arch_state = arm_arch_state,
.target_request_data = arm7_9_target_request_data,
.deassert_reset = arm7_9_deassert_reset,
.soft_reset_halt = arm7_9_soft_reset_halt,
- .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+ .get_gdb_reg_list = arm_get_gdb_reg_list,
.read_memory = arm7_9_read_memory,
.write_memory = arm7_9_write_memory,
.bulk_write_memory = arm7_9_bulk_write_memory,
- .checksum_memory = arm7_9_checksum_memory,
- .blank_check_memory = arm7_9_blank_check_memory,
+
+ .checksum_memory = arm_checksum_memory,
+ .blank_check_memory = arm_blank_check_memory,
.run_algorithm = armv4_5_run_algorithm,
.add_watchpoint = arm7_9_add_watchpoint,
.remove_watchpoint = arm7_9_remove_watchpoint,
- .register_commands = arm7_9_register_commands,
+ .commands = arm7_9_command_handlers,
.target_create = arm7tdmi_target_create,
.init_target = arm7tdmi_init_target,
- .examine = arm7tdmi_examine,
+ .examine = arm7_9_examine,
+ .check_reset = arm7_9_check_reset,
};
projects / fw / openocd / blobdiff