mips: fix gaffe when removing dynamic array allocation
[fw/openocd] / src / target / arm7tdmi.c
index 2614d9e42100740f75194de9494426a903627716..742eace77c8de3671996045cf6caa59fba071e15 100644 (file)
@@ -29,6 +29,7 @@
 
 #include "arm7tdmi.h"
 #include "target_type.h"
+#include "register.h"
 
 
 /*
@@ -41,7 +42,7 @@
 #define _DEBUG_INSTRUCTION_EXECUTION_
 #endif
 
-static int arm7tdmi_examine_debug_reason(target_t *target)
+static int arm7tdmi_examine_debug_reason(struct target *target)
 {
        int retval = ERROR_OK;
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
@@ -96,7 +97,7 @@ static int arm7tdmi_examine_debug_reason(target_t *target)
 
 static const int arm7tdmi_num_bits[] = {1, 32};
 
-static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, uint32_t out, int breakpoint)
+static __inline int arm7tdmi_clock_out_inner(struct arm_jtag *jtag_info, uint32_t out, int breakpoint)
 {
        uint32_t values[2]={breakpoint, flip_u32(out, 32)};
 
@@ -116,7 +117,7 @@ static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, uint32_t out
  *
  * FIXME remove the unused "deprecated" parameter
  */
-static __inline int arm7tdmi_clock_out(arm_jtag_t *jtag_info,
+static __inline int arm7tdmi_clock_out(struct arm_jtag *jtag_info,
                uint32_t out, uint32_t *deprecated, int breakpoint)
 {
        jtag_set_end_state(TAP_DRPAUSE);
@@ -127,7 +128,7 @@ static __inline int arm7tdmi_clock_out(arm_jtag_t *jtag_info,
 }
 
 /* clock the target, reading the databus */
-static int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in)
+static int arm7tdmi_clock_data_in(struct arm_jtag *jtag_info, uint32_t *in)
 {
        int retval = ERROR_OK;
        struct scan_field fields[2];
@@ -213,7 +214,7 @@ static int arm7endianness(jtag_callback_data_t arg,
  * the *in pointer points to a buffer where elements of 'size' bytes
  * are stored in big (be == 1) or little (be == 0) endianness
  */
-static int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info,
+static int arm7tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info,
                void *in, int size, int be)
 {
        int retval = ERROR_OK;
@@ -263,11 +264,11 @@ static int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info,
        return ERROR_OK;
 }
 
-static void arm7tdmi_change_to_arm(target_t *target,
+static void arm7tdmi_change_to_arm(struct target *target,
                uint32_t *r0, uint32_t *pc)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* save r0 before using it and put system in ARM state
         * to allow common handling of ARM and THUMB debugging */
@@ -319,12 +320,12 @@ static void arm7tdmi_change_to_arm(target_t *target,
  * The solution is to arrange for a large out/in scan in this loop and
  * and convert data afterwards.
  */
-static void arm7tdmi_read_core_regs(target_t *target,
+static void arm7tdmi_read_core_regs(struct target *target,
                uint32_t mask, uint32_t* core_regs[16])
 {
        int i;
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* STMIA r0-15, [r0] at debug speed
         * register values will start to appear on 4th DCLK
@@ -344,12 +345,12 @@ static void arm7tdmi_read_core_regs(target_t *target,
        }
 }
 
-static void arm7tdmi_read_core_regs_target_buffer(target_t *target,
+static void arm7tdmi_read_core_regs_target_buffer(struct target *target,
                uint32_t mask, void* buffer, int size)
 {
        int i;
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
        int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0;
        uint32_t *buf_u32 = buffer;
        uint16_t *buf_u16 = buffer;
@@ -386,10 +387,10 @@ static void arm7tdmi_read_core_regs_target_buffer(target_t *target,
        }
 }
 
-static void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
+static void arm7tdmi_read_xpsr(struct target *target, uint32_t *xpsr, int spsr)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* MRS r0, cpsr */
        arm7tdmi_clock_out(jtag_info, ARMV4_5_MRS(0, spsr & 1), NULL, 0);
@@ -404,10 +405,10 @@ static void arm7tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr)
        arm7tdmi_clock_data_in(jtag_info, xpsr);
 }
 
-static void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
+static void arm7tdmi_write_xpsr(struct target *target, uint32_t xpsr, int spsr)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        LOG_DEBUG("xpsr: %8.8" PRIx32 ", spsr: %i", xpsr, spsr);
 
@@ -433,11 +434,11 @@ static void arm7tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
        arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
 }
 
-static void arm7tdmi_write_xpsr_im8(target_t *target,
+static void arm7tdmi_write_xpsr_im8(struct target *target,
                uint8_t xpsr_im, int rot, int spsr)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        LOG_DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr);
 
@@ -451,12 +452,12 @@ static void arm7tdmi_write_xpsr_im8(target_t *target,
        arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
 }
 
-static void arm7tdmi_write_core_regs(target_t *target,
+static void arm7tdmi_write_core_regs(struct target *target,
                uint32_t mask, uint32_t core_regs[16])
 {
        int i;
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* LDMIA r0-15, [r0] at debug speed
        * register values will start to appear on 4th DCLK
@@ -477,10 +478,10 @@ static void arm7tdmi_write_core_regs(target_t *target,
        arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0);
 }
 
-static void arm7tdmi_load_word_regs(target_t *target, uint32_t mask)
+static void arm7tdmi_load_word_regs(struct target *target, uint32_t mask)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* put system-speed load-multiple into the pipeline */
        arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
@@ -488,10 +489,10 @@ static void arm7tdmi_load_word_regs(target_t *target, uint32_t mask)
        arm7tdmi_clock_out(jtag_info, ARMV4_5_LDMIA(0, mask & 0xffff, 0, 1), NULL, 0);
 }
 
-static void arm7tdmi_load_hword_reg(target_t *target, int num)
+static void arm7tdmi_load_hword_reg(struct target *target, int num)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* put system-speed load half-word into the pipeline */
        arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
@@ -499,10 +500,10 @@ static void arm7tdmi_load_hword_reg(target_t *target, int num)
        arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRH_IP(num, 0), NULL, 0);
 }
 
-static void arm7tdmi_load_byte_reg(target_t *target, int num)
+static void arm7tdmi_load_byte_reg(struct target *target, int num)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* put system-speed load byte into the pipeline */
        arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
@@ -510,10 +511,10 @@ static void arm7tdmi_load_byte_reg(target_t *target, int num)
        arm7tdmi_clock_out(jtag_info, ARMV4_5_LDRB_IP(num, 0), NULL, 0);
 }
 
-static void arm7tdmi_store_word_regs(target_t *target, uint32_t mask)
+static void arm7tdmi_store_word_regs(struct target *target, uint32_t mask)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* put system-speed store-multiple into the pipeline */
        arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
@@ -521,10 +522,10 @@ static void arm7tdmi_store_word_regs(target_t *target, uint32_t mask)
        arm7tdmi_clock_out(jtag_info, ARMV4_5_STMIA(0, mask, 0, 1), NULL, 0);
 }
 
-static void arm7tdmi_store_hword_reg(target_t *target, int num)
+static void arm7tdmi_store_hword_reg(struct target *target, int num)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* put system-speed store half-word into the pipeline */
        arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
@@ -532,10 +533,10 @@ static void arm7tdmi_store_hword_reg(target_t *target, int num)
        arm7tdmi_clock_out(jtag_info, ARMV4_5_STRH_IP(num, 0), NULL, 0);
 }
 
-static void arm7tdmi_store_byte_reg(target_t *target, int num)
+static void arm7tdmi_store_byte_reg(struct target *target, int num)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* put system-speed store byte into the pipeline */
        arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
@@ -543,10 +544,10 @@ static void arm7tdmi_store_byte_reg(target_t *target, int num)
        arm7tdmi_clock_out(jtag_info, ARMV4_5_STRB_IP(num, 0), NULL, 0);
 }
 
-static void arm7tdmi_write_pc(target_t *target, uint32_t pc)
+static void arm7tdmi_write_pc(struct target *target, uint32_t pc)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        /* LDMIA r0-15, [r0] at debug speed
         * register values will start to appear on 4th DCLK
@@ -568,21 +569,21 @@ static void arm7tdmi_write_pc(target_t *target, uint32_t pc)
        arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0);
 }
 
-static void arm7tdmi_branch_resume(target_t *target)
+static void arm7tdmi_branch_resume(struct target *target)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 
        arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1);
        arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_B(0xfffffa, 0), 0);
 }
 
-static void arm7tdmi_branch_resume_thumb(target_t *target)
+static void arm7tdmi_branch_resume_thumb(struct target *target)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common;
-       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
-       reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
+       struct arm *armv4_5 = &arm7_9->armv4_5_common;
+       struct arm_jtag *jtag_info = &arm7_9->jtag_info;
+       struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
 
        LOG_DEBUG("-");
 
@@ -637,64 +638,24 @@ static void arm7tdmi_branch_resume_thumb(target_t *target)
        arm7tdmi_clock_out(jtag_info, ARMV4_5_T_B(0x7f8), NULL, 0);
 }
 
-static void arm7tdmi_build_reg_cache(target_t *target)
+static void arm7tdmi_build_reg_cache(struct target *target)
 {
-       reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
-       struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target);
+       struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
+       struct arm *armv4_5 = target_to_armv4_5(target);
 
        (*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
-       armv4_5->core_cache = (*cache_p);
 }
 
-int arm7tdmi_examine(struct target_s *target)
-{
-       struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
-       int retval;
-
-
-       if (!target_was_examined(target))
-       {
-               /* get pointers to arch-specific information */
-               reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
-               reg_cache_t *t = embeddedice_build_reg_cache(target, arm7_9);
-               if (t == NULL)
-                       return ERROR_FAIL;
-
-               (*cache_p) = t;
-               arm7_9->eice_cache = (*cache_p);
-
-               if (arm7_9->armv4_5_common.etm)
-               {
-                       arm_jtag_t *jtag_info = &arm7_9->jtag_info;
-                       (*cache_p)->next = etm_build_reg_cache(target,
-                                       jtag_info, arm7_9->armv4_5_common.etm);
-                       arm7_9->armv4_5_common.etm->reg_cache = (*cache_p)->next;
-               }
-               target_set_examined(target);
-       }
-       if ((retval = embeddedice_setup(target)) != ERROR_OK)
-               return retval;
-       if ((retval = arm7_9_setup(target)) != ERROR_OK)
-               return retval;
-       if (arm7_9->armv4_5_common.etm)
-       {
-               if ((retval = etm_setup(target)) != ERROR_OK)
-                       return retval;
-       }
-       return ERROR_OK;
-}
-
-int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
+int arm7tdmi_init_target(struct command_context *cmd_ctx, struct target *target)
 {
        arm7tdmi_build_reg_cache(target);
 
        return ERROR_OK;
 }
 
-int arm7tdmi_init_arch_info(target_t *target, struct arm7tdmi_common *arm7tdmi, struct jtag_tap *tap)
+int arm7tdmi_init_arch_info(struct target *target,
+               struct arm7_9_common *arm7_9, struct jtag_tap *tap)
 {
-       struct arm7_9_common *arm7_9 = &arm7tdmi->arm7_9_common;
-
        /* prepare JTAG information for the new target */
        arm7_9->jtag_info.tap = tap;
        arm7_9->jtag_info.scann_size = 4;
@@ -741,19 +702,19 @@ int arm7tdmi_init_arch_info(target_t *target, struct arm7tdmi_common *arm7tdmi,
        return ERROR_OK;
 }
 
-static int arm7tdmi_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm7tdmi_target_create(struct target *target, Jim_Interp *interp)
 {
-       struct arm7tdmi_common *arm7tdmi;
+       struct arm7_9_common *arm7_9;
 
-       arm7tdmi = calloc(1,sizeof(struct arm7tdmi_common));
-       arm7tdmi_init_arch_info(target, arm7tdmi, target->tap);
-       arm7tdmi->arm7_9_common.armv4_5_common.is_armv4 = true;
+       arm7_9 = calloc(1,sizeof(struct arm7_9_common));
+       arm7tdmi_init_arch_info(target, arm7_9, target->tap);
+       arm7_9->armv4_5_common.is_armv4 = true;
 
        return ERROR_OK;
 }
 
 /** Holds methods for ARM7TDMI targets. */
-target_type_t arm7tdmi_target =
+struct target_type arm7tdmi_target =
 {
        .name = "arm7tdmi",
 
@@ -775,8 +736,9 @@ target_type_t arm7tdmi_target =
        .read_memory = arm7_9_read_memory,
        .write_memory = arm7_9_write_memory,
        .bulk_write_memory = arm7_9_bulk_write_memory,
-       .checksum_memory = arm7_9_checksum_memory,
-       .blank_check_memory = arm7_9_blank_check_memory,
+
+       .checksum_memory = arm_checksum_memory,
+       .blank_check_memory = arm_blank_check_memory,
 
        .run_algorithm = armv4_5_run_algorithm,
 
@@ -788,5 +750,5 @@ target_type_t arm7tdmi_target =
        .register_commands  = arm7_9_register_commands,
        .target_create  = arm7tdmi_target_create,
        .init_target = arm7tdmi_init_target,
-       .examine = arm7tdmi_examine,
+       .examine = arm7_9_examine,
 };