int handle_arm7_9_dcc_downloads_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
int handle_arm7_9_etm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-
static int arm7_9_clear_watchpoints(arm7_9_common_t *arm7_9)
{
embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], 0x0);
return arm7_9_clear_watchpoints(arm7_9);
}
-
int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p)
{
armv4_5_common_t *armv4_5 = target->arch_info;
}
return retval;
-
}
int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
}
}
-
arm7_9->breakpoint_count++;
return arm7_9_set_breakpoint(target, breakpoint);
return ERROR_OK;
}
-
-
-
int arm7_9_execute_sys_speed(struct target_s *target)
{
int retval;
reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
/* set RESTART instruction */
- jtag_add_end_state(TAP_RTI);
+ jtag_add_end_state(TAP_IDLE);
if (arm7_9->need_bypass_before_restart) {
arm7_9->need_bypass_before_restart = 0;
arm_jtag_set_instr(jtag_info, 0xf, NULL);
reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
/* set RESTART instruction */
- jtag_add_end_state(TAP_RTI);
+ jtag_add_end_state(TAP_IDLE);
if (arm7_9->need_bypass_before_restart) {
arm7_9->need_bypass_before_restart = 0;
arm_jtag_set_instr(jtag_info, 0xf, NULL);
/* check for DBGACK and SYSCOMP set (others don't care) */
/* NB! These are constants that must be available until after next jtag_execute() and
- we evaluate the values upon first execution in lieu of setting up these constants
- during early setup.
- */
+ * we evaluate the values upon first execution in lieu of setting up these constants
+ * during early setup.
+ * */
buf_set_u32(check_value, 0, 32, 0x9);
buf_set_u32(check_mask, 0, 32, 0x9);
set=1;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
reg_t *dcc_control = &arm7_9->eice_cache->reg_list[EICE_COMMS_CTRL];
-
if (!target->dbg_msg_enabled)
return ERROR_OK;
jtag_add_reset(0, 1);
}
-
target->state = TARGET_RESET;
jtag_add_sleep(50000);
armv4_5_invalidate_core_regs(target);
- if ((target->reset_halt)&&((jtag_reset_config & RESET_SRST_PULLS_TRST)==0))
+ if ((target->reset_halt)&&((jtag_reset_config & RESET_SRST_PULLS_TRST)==0))
{
/* debug entry was already prepared in arm7_9_assert_reset() */
target->debug_reason = DBG_REASON_DBGRQ;
}
return ERROR_OK;
-
}
int arm7_9_deassert_reset(target_t *target)
{
int retval=ERROR_OK;
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple( nvp_target_state,target->state)->name);
-
+ Jim_Nvp_value2name_simple( nvp_target_state,target->state)->name);
/* deassert reset lines */
jtag_add_reset(0, 0);
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
/* set RESTART instruction */
- jtag_add_end_state(TAP_RTI);
+ jtag_add_end_state(TAP_IDLE);
if (arm7_9->need_bypass_before_restart) {
arm7_9->need_bypass_before_restart = 0;
arm_jtag_set_instr(jtag_info, 0xf, NULL);
}
arm_jtag_set_instr(jtag_info, 0x4, NULL);
- jtag_add_runtest(1, TAP_RTI);
+ jtag_add_runtest(1, TAP_IDLE);
return jtag_execute_queue();
}
}
}
-
int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution)
{
armv4_5_common_t *armv4_5 = target->arch_info;
}
return err;
-
}
int arm7_9_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode)
}
return ERROR_OK;
-
}
int arm7_9_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mode, u32 value)
static int dcc_count;
static u8 *dcc_buffer;
-
static int arm7_9_dcc_completion(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info)
{
int retval = ERROR_OK;
if (count>2)
{
/* Handle first & last using standard embeddedice_write_reg and the middle ones w/the
- core function repeated.
- */
+ * core function repeated. */
embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little));
buffer+=4;
embeddedice_reg_t *ice_reg = arm7_9->eice_cache->reg_list[EICE_COMMS_DATA].arch_info;
u8 reg_addr = ice_reg->addr & 0x1f;
- int chain_pos = ice_reg->jtag_info->chain_pos;
+ jtag_tap_t *tap;
+ tap = ice_reg->jtag_info->tap;
- embeddedice_write_dcc(chain_pos, reg_addr, buffer, little, count-2);
+ embeddedice_write_dcc(tap, reg_addr, buffer, little, count-2);
buffer += (count-2)*4;
embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little));
return target_wait_state(target, TARGET_HALTED, 500);
}
-
static const u32 dcc_code[] =
{
/* MRC TST BNE MRC STR B */
int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info));
-
int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer)
{
int retval;
buf_set_u32(reg_params[0].value, 0, 32, address);
- //armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem_param_t *mem_params,
- // int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target_s *target, u32 exit_point, int timeout_ms, void *arch_info))
dcc_count=count;
dcc_buffer=buffer;
retval = armv4_5_run_algorithm_inner(target, 0, NULL, 1, reg_params,
register_command(cmd_ctx, arm7_9_cmd, "dbgrq", handle_arm7_9_dbgrq_command,
COMMAND_ANY, "use EmbeddedICE dbgrq instead of breakpoint for target halt requests <enable|disable>");
- register_command(cmd_ctx, arm7_9_cmd, "fast_writes", handle_arm7_9_fast_memory_access_command,
- COMMAND_ANY, "(deprecated, see: arm7_9 fast_memory_access)");
register_command(cmd_ctx, arm7_9_cmd, "fast_memory_access", handle_arm7_9_fast_memory_access_command,
COMMAND_ANY, "use fast memory accesses instead of slower but potentially unsafe slow accesses <enable|disable>");
register_command(cmd_ctx, arm7_9_cmd, "dcc_downloads", handle_arm7_9_dcc_downloads_command,
value = strtoul(args[2], NULL, 0);
return arm7_9_write_core_reg(target, num, mode, value);
-
}
-
int handle_arm7_9_dbgrq_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
target_t *target = get_current_target(cmd_ctx);