#define _DEBUG_INSTRUCTION_EXECUTION_
#endif
-static int arm720t_scan_cp15(target_t *target,
+static int arm720t_scan_cp15(struct target *target,
uint32_t out, uint32_t *in, int instruction, int clock)
{
int retval;
- struct arm720t_common_s *arm720t = target_to_arm720(target);
- arm_jtag_t *jtag_info;
- scan_field_t fields[2];
+ struct arm720t_common *arm720t = target_to_arm720(target);
+ struct arm_jtag *jtag_info;
+ struct scan_field fields[2];
uint8_t out_buf[4];
uint8_t instruction_buf = instruction;
return ERROR_OK;
}
-static int arm720t_read_cp15(target_t *target, uint32_t opcode, uint32_t *value)
+static int arm720t_read_cp15(struct target *target, uint32_t opcode, uint32_t *value)
{
/* fetch CP15 opcode */
arm720t_scan_cp15(target, opcode, NULL, 1, 1);
return ERROR_OK;
}
-static int arm720t_write_cp15(target_t *target, uint32_t opcode, uint32_t value)
+static int arm720t_write_cp15(struct target *target, uint32_t opcode, uint32_t value)
{
/* fetch CP15 opcode */
arm720t_scan_cp15(target, opcode, NULL, 1, 1);
return ERROR_OK;
}
-static uint32_t arm720t_get_ttb(target_t *target)
+static uint32_t arm720t_get_ttb(struct target *target)
{
uint32_t ttb = 0x0;
return ttb;
}
-static void arm720t_disable_mmu_caches(target_t *target,
+static void arm720t_disable_mmu_caches(struct target *target,
int mmu, int d_u_cache, int i_cache)
{
uint32_t cp15_control;
arm720t_write_cp15(target, 0xee010f10, cp15_control);
}
-static void arm720t_enable_mmu_caches(target_t *target,
+static void arm720t_enable_mmu_caches(struct target *target,
int mmu, int d_u_cache, int i_cache)
{
uint32_t cp15_control;
arm720t_write_cp15(target, 0xee010f10, cp15_control);
}
-static void arm720t_post_debug_entry(target_t *target)
+static void arm720t_post_debug_entry(struct target *target)
{
- struct arm720t_common_s *arm720t = target_to_arm720(target);
+ struct arm720t_common *arm720t = target_to_arm720(target);
/* examine cp15 control reg */
arm720t_read_cp15(target, 0xee110f10, &arm720t->cp15_control_reg);
jtag_execute_queue();
}
-static void arm720t_pre_restore_context(target_t *target)
+static void arm720t_pre_restore_context(struct target *target)
{
- struct arm720t_common_s *arm720t = target_to_arm720(target);
+ struct arm720t_common *arm720t = target_to_arm720(target);
/* restore i/d fault status and address register */
arm720t_write_cp15(target, 0xee050f10, arm720t->fsr_reg);
}
static int arm720t_verify_pointer(struct command_context_s *cmd_ctx,
- struct arm720t_common_s *arm720t)
+ struct arm720t_common *arm720t)
{
if (arm720t->common_magic != ARM720T_COMMON_MAGIC) {
command_print(cmd_ctx, "target is not an ARM720");
return ERROR_OK;
}
-static int arm720t_arch_state(struct target_s *target)
+static int arm720t_arch_state(struct target *target)
{
- struct arm720t_common_s *arm720t = target_to_arm720(target);
+ struct arm720t_common *arm720t = target_to_arm720(target);
struct armv4_5_common_s *armv4_5;
static const char *state[] =
return ERROR_OK;
}
-static int arm720_mmu(struct target_s *target, int *enabled)
+static int arm720_mmu(struct target *target, int *enabled)
{
if (target->state != TARGET_HALTED) {
LOG_ERROR("%s: target not halted", __func__);
return ERROR_OK;
}
-static int arm720_virt2phys(struct target_s *target,
+static int arm720_virt2phys(struct target *target,
uint32_t virt, uint32_t *phys)
{
/** @todo Implement this! */
return ERROR_FAIL;
}
-static int arm720t_read_memory(struct target_s *target,
+static int arm720t_read_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
int retval;
- struct arm720t_common_s *arm720t = target_to_arm720(target);
+ struct arm720t_common *arm720t = target_to_arm720(target);
/* disable cache, but leave MMU enabled */
if (arm720t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled)
return retval;
}
-static int arm720t_read_phys_memory(struct target_s *target,
+static int arm720t_read_phys_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
- struct arm720t_common_s *arm720t = target_to_arm720(target);
+ struct arm720t_common *arm720t = target_to_arm720(target);
return armv4_5_mmu_read_physical(target, &arm720t->armv4_5_mmu, address, size, count, buffer);
}
-static int arm720t_write_phys_memory(struct target_s *target,
+static int arm720t_write_phys_memory(struct target *target,
uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
- struct arm720t_common_s *arm720t = target_to_arm720(target);
+ struct arm720t_common *arm720t = target_to_arm720(target);
return armv4_5_mmu_write_physical(target, &arm720t->armv4_5_mmu, address, size, count, buffer);
}
-static int arm720t_soft_reset_halt(struct target_s *target)
+static int arm720t_soft_reset_halt(struct target *target)
{
int retval = ERROR_OK;
- struct arm720t_common_s *arm720t = target_to_arm720(target);
- reg_t *dbg_stat = &arm720t->arm7tdmi_common.arm7_9_common
+ struct arm720t_common *arm720t = target_to_arm720(target);
+ struct reg *dbg_stat = &arm720t->arm7tdmi_common.arm7_9_common
.eice_cache->reg_list[EICE_DBG_STAT];
struct armv4_5_common_s *armv4_5 = &arm720t->arm7tdmi_common
.arm7_9_common.armv4_5_common;
return ERROR_OK;
}
-static int arm720t_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
+static int arm720t_init_target(struct command_context_s *cmd_ctx, struct target *target)
{
return arm7tdmi_init_target(cmd_ctx, target);
}
-static int arm720t_init_arch_info(target_t *target,
- arm720t_common_t *arm720t, jtag_tap_t *tap)
+static int arm720t_init_arch_info(struct target *target,
+ struct arm720t_common *arm720t, struct jtag_tap *tap)
{
- arm7tdmi_common_t *arm7tdmi = &arm720t->arm7tdmi_common;
- arm7_9_common_t *arm7_9 = &arm7tdmi->arm7_9_common;
+ struct arm7tdmi_common *arm7tdmi = &arm720t->arm7tdmi_common;
+ struct arm7_9_common *arm7_9 = &arm7tdmi->arm7_9_common;
arm7tdmi_init_arch_info(target, arm7tdmi, tap);
return ERROR_OK;
}
-static int arm720t_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm720t_target_create(struct target *target, Jim_Interp *interp)
{
- struct arm720t_common_s *arm720t = calloc(1, sizeof(*arm720t));
+ struct arm720t_common *arm720t = calloc(1, sizeof(*arm720t));
arm720t->arm7tdmi_common.arm7_9_common.armv4_5_common.is_armv4 = true;
return arm720t_init_arch_info(target, arm720t, target->tap);
COMMAND_HANDLER(arm720t_handle_cp15_command)
{
int retval;
- target_t *target = get_current_target(cmd_ctx);
- struct arm720t_common_s *arm720t = target_to_arm720(target);
- arm_jtag_t *jtag_info;
+ struct target *target = get_current_target(cmd_ctx);
+ struct arm720t_common *arm720t = target_to_arm720(target);
+ struct arm_jtag *jtag_info;
retval = arm720t_verify_pointer(cmd_ctx, arm720t);
if (retval != ERROR_OK)
return ERROR_OK;
}
-static int arm720t_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+static int arm720t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
{
if (cpnum!=15)
{
}
-static int arm720t_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+static int arm720t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
{
if (cpnum!=15)
{
}
/** Holds methods for ARM720 targets. */
-target_type_t arm720t_target =
+struct target_type arm720t_target =
{
.name = "arm720t",