/* REVISIT no error handling here! */
-static void arm11_add_ir_scan_vc(int num_fields, struct scan_field *fields,
+static void arm11_add_ir_scan_vc(struct jtag_tap *tap, struct scan_field *fields,
tap_state_t state)
{
if (cmd_queue_cur_state == TAP_IRPAUSE)
jtag_add_pathmove(ARRAY_SIZE(arm11_move_pi_to_si_via_ci), arm11_move_pi_to_si_via_ci);
- jtag_add_ir_scan(num_fields, fields, state);
+ jtag_add_ir_scan(tap, fields, state);
}
static const tap_state_t arm11_move_pd_to_sd_via_cd[] =
};
/* REVISIT no error handling here! */
-void arm11_add_dr_scan_vc(int num_fields, struct scan_field *fields,
+void arm11_add_dr_scan_vc(struct jtag_tap *tap, int num_fields, struct scan_field *fields,
tap_state_t state)
{
if (cmd_queue_cur_state == TAP_DRPAUSE)
jtag_add_pathmove(ARRAY_SIZE(arm11_move_pd_to_sd_via_cd), arm11_move_pd_to_sd_via_cd);
- jtag_add_dr_scan(num_fields, fields, state);
+ jtag_add_dr_scan(tap, num_fields, fields, state);
}
void arm11_setup_field(struct arm11_common *arm11, int num_bits,
void *out_data, void *in_data, struct scan_field *field)
{
- field->tap = arm11->arm.target->tap;
field->num_bits = num_bits;
field->out_value = out_data;
field->in_value = in_data;
arm11_setup_field(arm11, 5, &instr, NULL, &field);
- arm11_add_ir_scan_vc(1, &field, state == ARM11_TAP_DEFAULT ? TAP_IRPAUSE : state);
+ arm11_add_ir_scan_vc(arm11->arm.target->tap, &field, state == ARM11_TAP_DEFAULT ? TAP_IRPAUSE : state);
}
/** Verify data shifted out from Scan Chain Register (SCREG). */
* NOTE: the ITRSEL instruction fakes SCREG changing;
* but leaves its actual value unchanged.
*/
+#if 0
+ // FIX!!! the optimization below is broken because we do not
+ // invalidate the cur_scan_chain upon a TRST/TMS. See arm_jtag.c
+ // for example on how to invalidate cur_scan_chain. Tested patches gladly
+ // accepted!
if (arm11->jtag_info.cur_scan_chain == chain) {
JTAG_DEBUG("SCREG <= %d SKIPPED", chain);
return jtag_add_statemove((state == ARM11_TAP_DEFAULT)
? TAP_DRPAUSE : state);
}
+#endif
JTAG_DEBUG("SCREG <= %d", chain);
arm11_add_IR(arm11, ARM11_SCAN_N, ARM11_TAP_DEFAULT);
uint8_t tmp[1];
arm11_setup_field(arm11, 5, &chain, &tmp, &field);
- arm11_add_dr_scan_vc(1, &field, state == ARM11_TAP_DEFAULT ? TAP_DRPAUSE : state);
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, 1, &field, state == ARM11_TAP_DEFAULT ? TAP_DRPAUSE : state);
jtag_execute_queue_noclear();
arm11_setup_field(arm11, 32, &inst, NULL, itr + 0);
arm11_setup_field(arm11, 1, NULL, flag, itr + 1);
- arm11_add_dr_scan_vc(ARRAY_SIZE(itr), itr, state);
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(itr), itr, state);
}
/**
arm11_setup_field(arm11, 32, NULL, &dscr, &chain1_field);
- arm11_add_dr_scan_vc(1, &chain1_field, TAP_DRPAUSE);
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, 1, &chain1_field, TAP_DRPAUSE);
CHECK_RETVAL(jtag_execute_queue());
arm11_setup_field(arm11, 32, &dscr, NULL, &chain1_field);
- arm11_add_dr_scan_vc(1, &chain1_field, TAP_DRPAUSE);
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, 1, &chain1_field, TAP_DRPAUSE);
CHECK_RETVAL(jtag_execute_queue());
{
Data = *data;
- arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, jtag_set_end_state(TAP_IDLE));
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain5_fields), chain5_fields, TAP_IDLE);
CHECK_RETVAL(jtag_execute_queue());
{
Data = 0;
- arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
CHECK_RETVAL(jtag_execute_queue());
{
struct scan_field chain5_fields[3];
- chain5_fields[0].tap = tap;
chain5_fields[0].num_bits = 32;
chain5_fields[0].out_value = NULL; /*&Data*/
chain5_fields[0].in_value = NULL;
- chain5_fields[1].tap = tap;
chain5_fields[1].num_bits = 1;
chain5_fields[1].out_value = NULL;
chain5_fields[1].in_value = NULL; /*&Ready*/
- chain5_fields[2].tap = tap;
chain5_fields[2].num_bits = 1;
chain5_fields[2].out_value = NULL;
chain5_fields[2].in_value = NULL;
if (count > 0)
{
- jtag_add_dr_scan(ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
+ jtag_add_dr_scan(tap, ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
} else
{
- jtag_add_dr_scan(ARRAY_SIZE(chain5_fields), chain5_fields, TAP_IDLE);
+ jtag_add_dr_scan(tap, ARRAY_SIZE(chain5_fields), chain5_fields, TAP_IDLE);
}
}
int retval = arm11_run_instr_data_to_core_noack_inner(arm11->arm.target->tap, opcode, data, count);
- if (retval != ERROR_FAIL)
+ if (retval != ERROR_OK)
return retval;
arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT);
uint8_t ready_flag;
chain5_fields[1].in_value = &ready_flag;
- arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE);
retval = jtag_execute_queue();
if (retval == ERROR_OK)
int i = 0;
do
{
- arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, count ? TAP_IDLE : TAP_DRPAUSE);
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain5_fields), chain5_fields, count ? TAP_IDLE : TAP_DRPAUSE);
CHECK_RETVAL(jtag_execute_queue());
}
/* Timeout here so we don't get stuck. */
- int i = 0;
+ int i_n = 0;
while (1)
{
JTAG_DEBUG("SC7 <= c%-3d Data %08x %s",
(unsigned) DataOut,
nRW ? "write" : "read");
- arm11_add_dr_scan_vc(ARRAY_SIZE(chain7_fields),
+ arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain7_fields),
chain7_fields, TAP_DRPAUSE);
CHECK_RETVAL(jtag_execute_queue());
long long then = 0;
- if (i == 1000)
+ if (i_n == 1000)
{
then = timeval_ms();
}
- if (i >= 1000)
+ if (i_n >= 1000)
{
if ((timeval_ms()-then) > 1000)
{
}
}
- i++;
+ i_n++;
}
if (!nRW)
* \param arm11 Target state variable.
*
*/
-void arm11_sc7_clear_vbw(struct arm11_common * arm11)
+int arm11_sc7_clear_vbw(struct arm11_common * arm11)
{
size_t clear_bw_size = arm11->brp + 1;
struct arm11_sc7_action *clear_bw = malloc(sizeof(struct arm11_sc7_action) * clear_bw_size);
(pos++)->address = ARM11_SC7_VCR;
- arm11_sc7_run(arm11, clear_bw, clear_bw_size);
+ int retval;
+ retval = arm11_sc7_run(arm11, clear_bw, clear_bw_size);
free (clear_bw);
+
+ return retval;
}
/** Write VCR register
* \param arm11 Target state variable.
* \param value Value to be written
*/
-void arm11_sc7_set_vcr(struct arm11_common * arm11, uint32_t value)
+int arm11_sc7_set_vcr(struct arm11_common * arm11, uint32_t value)
{
struct arm11_sc7_action set_vcr;
set_vcr.address = ARM11_SC7_VCR;
set_vcr.value = value;
- arm11_sc7_run(arm11, &set_vcr, 1);
+ return arm11_sc7_run(arm11, &set_vcr, 1);
}
static int arm11_dpm_prepare(struct arm_dpm *dpm)
{
- struct arm11_common *arm11 = dpm_to_arm11(dpm);
-
- arm11 = container_of(dpm->arm, struct arm11_common, arm);
-
return arm11_run_instr_data_prepare(dpm_to_arm11(dpm));
}
* and watchpoint operations instead of running them right away. Since we
* pre-allocated our vector, we don't need to worry about space.
*/
-static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned index,
+static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned index_t,
uint32_t addr, uint32_t control)
{
struct arm11_common *arm11 = dpm_to_arm11(dpm);
action[0].value = addr;
action[1].value = control;
- switch (index) {
+ switch (index_t) {
case 0 ... 15:
- action[0].address = ARM11_SC7_BVR0 + index;
- action[1].address = ARM11_SC7_BCR0 + index;
+ action[0].address = ARM11_SC7_BVR0 + index_t;
+ action[1].address = ARM11_SC7_BCR0 + index_t;
break;
case 16 ... 32:
- index -= 16;
- action[0].address = ARM11_SC7_WVR0 + index;
- action[1].address = ARM11_SC7_WCR0 + index;
+ index_t -= 16;
+ action[0].address = ARM11_SC7_WVR0 + index_t;
+ action[1].address = ARM11_SC7_WCR0 + index_t;
break;
default:
return ERROR_FAIL;
return ERROR_OK;
}
-static int arm11_bpwp_disable(struct arm_dpm *dpm, unsigned index)
+static int arm11_bpwp_disable(struct arm_dpm *dpm, unsigned index_t)
{
struct arm11_common *arm11 = dpm_to_arm11(dpm);
struct arm11_sc7_action *action;
action[0].write = true;
action[0].value = 0;
- switch (index) {
+ switch (index_t) {
case 0 ... 15:
- action[0].address = ARM11_SC7_BCR0 + index;
+ action[0].address = ARM11_SC7_BCR0 + index_t;
break;
case 16 ... 32:
- index -= 16;
- action[0].address = ARM11_SC7_WCR0 + index;
+ index_t -= 16;
+ action[0].address = ARM11_SC7_WCR0 + index_t;
break;
default:
return ERROR_FAIL;
projects / fw / openocd / blobdiff