/***************************************************************************
* Copyright (C) 2008 digenius technology GmbH. *
* *
+ * Copyright (C) 2008 Oyvind Harboe oyvind.harboe@zylin.com *
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
enum tap_state arm11_move_pi_to_si_via_ci[] =
{
- TAP_E2I, TAP_UI, TAP_SDS, TAP_SIS, TAP_CI, TAP_SI
+ TAP_IREXIT2, TAP_IRUPDATE, TAP_DRSELECT, TAP_IRSELECT, TAP_IRCAPTURE, TAP_IRSHIFT
};
int arm11_add_ir_scan_vc(int num_fields, scan_field_t *fields, enum tap_state state)
{
- if (cmd_queue_cur_state == TAP_PI)
+ if (cmd_queue_cur_state == TAP_IRPAUSE)
jtag_add_pathmove(asizeof(arm11_move_pi_to_si_via_ci), arm11_move_pi_to_si_via_ci);
- return jtag_add_ir_scan(num_fields, fields, state);
+ jtag_add_ir_scan(num_fields, fields, state);
+ return ERROR_OK;
}
enum tap_state arm11_move_pd_to_sd_via_cd[] =
{
- TAP_E2D, TAP_UD, TAP_SDS, TAP_CD, TAP_SD
+ TAP_DREXIT2, TAP_DRUPDATE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
};
int arm11_add_dr_scan_vc(int num_fields, scan_field_t *fields, enum tap_state state)
{
- if (cmd_queue_cur_state == TAP_PD)
+ if (cmd_queue_cur_state == TAP_DRPAUSE)
jtag_add_pathmove(asizeof(arm11_move_pd_to_sd_via_cd), arm11_move_pd_to_sd_via_cd);
- return jtag_add_dr_scan(num_fields, fields, state);
+ jtag_add_dr_scan(num_fields, fields, state);
+ return ERROR_OK;
}
*/
void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, void * in_data, scan_field_t * field)
{
- field->device = arm11->jtag_info.chain_pos;
+ field->tap = arm11->jtag_info.tap;
field->num_bits = num_bits;
field->out_mask = NULL;
field->in_check_mask = NULL;
*/
void arm11_add_IR(arm11_common_t * arm11, u8 instr, enum tap_state state)
{
- jtag_device_t *device = jtag_get_device(arm11->jtag_info.chain_pos);
+ jtag_tap_t *tap;
+ tap = arm11->jtag_info.tap;
+ if( tap == NULL ){
+ /* FIX!!!! error is logged, but not propagated back up the call stack... */
+ LOG_ERROR( "tap is null here! This is bad!");
+ return;
+ }
- if (buf_get_u32(device->cur_instr, 0, 5) == instr)
- {
- JTAG_DEBUG("IR <= 0x%02x SKIPPED", instr);
- return;
+ if (buf_get_u32(tap->cur_instr, 0, 5) == instr){
+ JTAG_DEBUG("IR <= 0x%02x SKIPPED", instr);
+ return;
}
JTAG_DEBUG("IR <= 0x%02x", instr);
arm11_setup_field(arm11, 5, &instr, NULL, &field);
- arm11_add_ir_scan_vc(1, &field, state == -1 ? TAP_PI : state);
+ arm11_add_ir_scan_vc(1, &field, state == -1 ? TAP_IRPAUSE : state);
}
/** Verify shifted out data from Scan Chain Register (SCREG)
if (v != 0x10)
{
- ERROR("'arm11 target' JTAG communication error SCREG SCAN OUT 0x%02x (expected 0x10)", v);
- exit(-1);
+ LOG_ERROR("'arm11 target' JTAG communication error SCREG SCAN OUT 0x%02x (expected 0x10)", v);
+ return ERROR_FAIL;
}
JTAG_DEBUG("SCREG SCAN OUT 0x%02x", v);
}
/** Select and write to Scan Chain Register (SCREG)
- *
+ *
* This function sets the instruction register to SCAN_N and writes
* the data register with the selected chain number.
*
field.in_handler = arm11_in_handler_SCAN_N;
- arm11_add_dr_scan_vc(1, &field, state == -1 ? TAP_PD : state);
+ arm11_add_dr_scan_vc(1, &field, state == -1 ? TAP_DRPAUSE : state);
}
/** Write an instruction into the ITR register
- *
+ *
* \param arm11 Target state variable.
* \param inst An ARM11 processor instruction/opcode.
* \param flag Optional parameter to retrieve the InstCompl flag
- * (this will be written when the JTAG chain is executed).
+ * (this will be written when the JTAG chain is executed).
* \param state Pass the final TAP state or -1 for the default
* value (Run-Test/Idle).
*
* \remarks By default this ends with Run-Test/Idle state
* and causes the instruction to be executed. If
* a subsequent write to DTR is needed before
- * executing the instruction then TAP_PD should be
+ * executing the instruction then TAP_DRPAUSE should be
* passed to \p state.
*
* \remarks This adds to the JTAG command queue but does \em not execute it.
arm11_setup_field(arm11, 32, &inst, NULL, itr + 0);
arm11_setup_field(arm11, 1, NULL, flag, itr + 1);
- arm11_add_dr_scan_vc(asizeof(itr), itr, state == -1 ? TAP_RTI : state);
+ arm11_add_dr_scan_vc(asizeof(itr), itr, state == -1 ? TAP_IDLE : state);
}
/** Read the Debug Status and Control Register (DSCR)
*
* \param arm11 Target state variable.
* \return DSCR content
- *
+ *
* \remarks This is a stand-alone function that executes the JTAG command queue.
*/
u32 arm11_read_DSCR(arm11_common_t * arm11)
arm11_setup_field(arm11, 32, NULL, &dscr, &chain1_field);
- arm11_add_dr_scan_vc(1, &chain1_field, TAP_PD);
+ arm11_add_dr_scan_vc(1, &chain1_field, TAP_DRPAUSE);
jtag_execute_queue();
if (arm11->last_dscr != dscr)
- JTAG_DEBUG("DSCR = %08x (OLD %08x)", dscr, arm11->last_dscr);
+ JTAG_DEBUG("DSCR = %08x (OLD %08x)", dscr, arm11->last_dscr);
arm11->last_dscr = dscr;
*
* \param arm11 Target state variable.
* \param dscr DSCR content
- *
+ *
* \remarks This is a stand-alone function that executes the JTAG command queue.
*/
void arm11_write_DSCR(arm11_common_t * arm11, u32 dscr)
arm11_setup_field(arm11, 32, &dscr, NULL, &chain1_field);
- arm11_add_dr_scan_vc(1, &chain1_field, TAP_PD);
+ arm11_add_dr_scan_vc(1, &chain1_field, TAP_DRPAUSE);
jtag_execute_queue();
*
* \param dscr DSCR value to analyze
* \return Debug reason
- *
+ *
*/
enum target_debug_reason arm11_get_DSCR_debug_reason(u32 dscr)
{
switch (dscr & ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_MASK)
{
- case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_HALT: return DBG_REASON_DBGRQ;
- case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BREAKPOINT: return DBG_REASON_BREAKPOINT;
- case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_WATCHPOINT: return DBG_REASON_WATCHPOINT;
- case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BKPT_INSTRUCTION: return DBG_REASON_BREAKPOINT;
- case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_EDBGRQ: return DBG_REASON_DBGRQ;
- case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_VECTOR_CATCH: return DBG_REASON_BREAKPOINT;
+ case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_HALT:
+ LOG_INFO("Debug entry: JTAG HALT");
+ return DBG_REASON_DBGRQ;
+
+ case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BREAKPOINT:
+ LOG_INFO("Debug entry: breakpoint");
+ return DBG_REASON_BREAKPOINT;
+
+ case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_WATCHPOINT:
+ LOG_INFO("Debug entry: watchpoint");
+ return DBG_REASON_WATCHPOINT;
+
+ case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BKPT_INSTRUCTION:
+ LOG_INFO("Debug entry: BKPT instruction");
+ return DBG_REASON_BREAKPOINT;
+
+ case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_EDBGRQ:
+ LOG_INFO("Debug entry: EDBGRQ signal");
+ return DBG_REASON_DBGRQ;
+
+ case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_VECTOR_CATCH:
+ LOG_INFO("Debug entry: VCR vector catch");
+ return DBG_REASON_BREAKPOINT;
default:
+ LOG_INFO("Debug entry: unknown");
return DBG_REASON_DBGRQ;
}
};
* Put arm11_run_instr_data_prepare() and arm11_run_instr_data_finish()
* around a block of arm11_run_instr_... calls.
*
- * Any RTI can lead to an instruction execution when
+ * Any IDLE can lead to an instruction execution when
* scan chains 4 or 5 are selected and the IR holds
* INTEST or EXTEST. So we must disable that before
- * any following activities lead to an RTI.
+ * any following activities lead to an IDLE.
*
* \param arm11 Target state variable.
*
while (count--)
{
- arm11_add_debug_INST(arm11, *opcode++, NULL, TAP_RTI);
+ arm11_add_debug_INST(arm11, *opcode++, NULL, TAP_IDLE);
while (1)
{
u8 flag;
- arm11_add_debug_INST(arm11, 0, &flag, count ? TAP_RTI : TAP_PD);
+ arm11_add_debug_INST(arm11, 0, &flag, count ? TAP_IDLE : TAP_DRPAUSE);
jtag_execute_queue();
{
arm11_add_IR(arm11, ARM11_ITRSEL, -1);
- arm11_add_debug_INST(arm11, opcode, NULL, TAP_PD);
+ arm11_add_debug_INST(arm11, opcode, NULL, TAP_DRPAUSE);
arm11_add_IR(arm11, ARM11_EXTEST, -1);
{
Data = *data;
- arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_RTI);
+ arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_IDLE);
jtag_execute_queue();
JTAG_DEBUG("DTR Ready %d nRetry %d", Ready, nRetry);
{
Data = 0;
- arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_PD);
+ arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
jtag_execute_queue();
JTAG_DEBUG("DTR Data %08x Ready %d nRetry %d", Data, Ready, nRetry);
/** JTAG path for arm11_run_instr_data_to_core_noack
*
- * The repeated TAP_RTI's do not cause a repeated execution
+ * The repeated TAP_IDLE's do not cause a repeated execution
* if passed without leaving the state.
*
* Since this is more than 7 bits (adjustable via adding more
- * TAP_RTI's) it produces an artificial delay in the lower
+ * TAP_IDLE's) it produces an artificial delay in the lower
* layer (FT2232) that is long enough to finish execution on
* the core but still shorter than any manually inducible delays.
*
*/
-enum tap_state arm11_MOVE_PD_RTI_PD_with_delay[] =
+enum tap_state arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
{
- TAP_E2D, TAP_UD, TAP_RTI, TAP_RTI, TAP_RTI, TAP_SDS, TAP_CD, TAP_SD
+ TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
};
{
arm11_add_IR(arm11, ARM11_ITRSEL, -1);
- arm11_add_debug_INST(arm11, opcode, NULL, TAP_PD);
+ arm11_add_debug_INST(arm11, opcode, NULL, TAP_DRPAUSE);
arm11_add_IR(arm11, ARM11_EXTEST, -1);
if (count)
{
- jtag_add_dr_scan(asizeof(chain5_fields), chain5_fields, TAP_PD);
- jtag_add_pathmove(asizeof(arm11_MOVE_PD_RTI_PD_with_delay),
- arm11_MOVE_PD_RTI_PD_with_delay);
+ jtag_add_dr_scan(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
+ jtag_add_pathmove(asizeof(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
+ arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
}
else
{
- jtag_add_dr_scan(asizeof(chain5_fields), chain5_fields, TAP_RTI);
+ jtag_add_dr_scan(asizeof(chain5_fields), chain5_fields, TAP_IDLE);
}
}
chain5_fields[0].out_value = 0;
chain5_fields[1].in_value = ReadyPos++;
- arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_PD);
+ arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
jtag_execute_queue();
}}
if (error_count)
- ERROR("Transfer errors %d", error_count);
+ LOG_ERROR("Transfer errors " ZU, error_count);
}
{
arm11_add_IR(arm11, ARM11_ITRSEL, -1);
- arm11_add_debug_INST(arm11, opcode, NULL, TAP_RTI);
+ arm11_add_debug_INST(arm11, opcode, NULL, TAP_IDLE);
arm11_add_IR(arm11, ARM11_INTEST, -1);
{
do
{
- arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, count ? TAP_RTI : TAP_PD);
+ arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, count ? TAP_IDLE : TAP_DRPAUSE);
jtag_execute_queue();
JTAG_DEBUG("DTR Data %08x Ready %d nRetry %d", Data, Ready, nRetry);
AddressOut = 0;
}
- do
+ do
{
JTAG_DEBUG("SC7 <= Address %02x Data %08x nRW %d", AddressOut, DataOut, nRW);
- arm11_add_dr_scan_vc(asizeof(chain7_fields), chain7_fields, TAP_PD);
+ arm11_add_dr_scan_vc(asizeof(chain7_fields), chain7_fields, TAP_DRPAUSE);
jtag_execute_queue();
JTAG_DEBUG("SC7 => Address %02x Data %08x Ready %d", AddressIn, DataIn, Ready);
{
if (actions[i - 1].address != AddressIn)
{
- WARNING("Scan chain 7 shifted out unexpected address");
+ LOG_WARNING("Scan chain 7 shifted out unexpected address");
}
if (!actions[i - 1].write)
{
if (actions[i - 1].value != DataIn)
{
- WARNING("Scan chain 7 shifted out unexpected data");
+ LOG_WARNING("Scan chain 7 shifted out unexpected data");
}
}
}
}
(pos++)->address = ARM11_SC7_VCR;
+
+ arm11_sc7_run(arm11, clear_bw, asizeof(clear_bw));
}
/** Write VCR register
{
arm11_sc7_action_t set_vcr;
- set_vcr.write = 0;
+ set_vcr.write = true;
set_vcr.address = ARM11_SC7_VCR;
set_vcr.value = value;
projects / fw / openocd / blobdiff